[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Add DG2 OA support (rev10)

[Patchwork]

== Series Details ==

Series: Add DG2 OA support (rev10)
URL   : https://patchwork.freedesktop.org/series/107584/
State : warning

== Summary ==

Error: dim checkpatch failed
f49ce1a759c5 drm/i915/perf: Fix OA filtering logic for GuC mode
5e811f8d8045 drm/i915/perf: Add 32-bit OAG and OAR formats for DG2
f2a0f8c599db drm/i915/perf: Fix noa wait predication for DG2
4c9bee347d42 drm/i915/perf: Determine gen12 oa ctx offset at runtime
800eb9bbcb4d drm/i915/perf: Enable bytes per clock reporting in OA
15c429e4a3e7 drm/i915/perf: Simply use stream->ctx
d7a5269e6445 drm/i915/perf: Move gt-specific data from i915->perf to gt->perf
98fa8eb88966 drm/i915/perf: Replace gt->perf.lock with stream->lock for file ops
276c535aa192 drm/i915/perf: Use gt-specific ggtt for OA and noa-wait buffers
cd3045fcbfd0 drm/i915/perf: Store a pointer to oa_format in oa_buffer
f44a92bea371 drm/i915/perf: Add Wa_1508761755:dg2
-:50: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#50: FILE: drivers/gpu/drm/i915/i915_perf.c:2786:
+		intel_gt_mcr_multicast_write(uncore->gt, GEN8_ROW_CHICKEN,
+				   _MASKED_BIT_ENABLE(STALL_DOP_GATING_DISABLE));

-:68: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#68: FILE: drivers/gpu/drm/i915/i915_perf.c:2875:
+		intel_gt_mcr_multicast_write(uncore->gt, GEN8_ROW_CHICKEN,
+				   _MASKED_BIT_DISABLE(STALL_DOP_GATING_DISABLE));

total: 0 errors, 0 warnings, 2 checks, 49 lines checked
fe2dbc205304 drm/i915/perf: Apply Wa_18013179988
a4b7e46b4cd2 drm/i915/perf: Save/restore EU flex counters across reset
5eb41a815bbb drm/i915/guc: Support OA when Wa_16011777198 is enabled
-:72: WARNING:AVOID_BUG: Do not crash the kernel unless it is absolutely unavoidable--use WARN_ON_ONCE() plus recovery code (if feasible) instead of BUG() or variants
#72: FILE: drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c:208:
+	GEM_BUG_ON(id >= SLPC_MAX_PARAM);

total: 0 errors, 1 warnings, 0 checks, 151 lines checked
2e3fe9aba6f6 drm/i915/perf: complete programming whitelisting for XEHPSDV
883cba29d24f drm/i915/perf: Enable OA for DG2