[Intel-gfx] [PATCH v6 00/16] Add DG2 OA support
Umesh Nerlige Ramappa
umesh.nerlige.ramappa at intel.com
Wed Oct 26 22:20:46 UTC 2022
Add OA format support for DG2 and various fixes for DG2.
This series has 2 uapi changes listed below:
1) drm/i915/perf: Add OAG and OAR formats for DG2
DG2 has new OA formats defined that can be selected by the
user. The UMD changes that are consumed by GPUvis are:
https://patchwork.freedesktop.org/patch/504456/?series=107633&rev=5
Mesa MR: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18893
2) drm/i915/perf: Apply Wa_18013179988
DG2 has a bug where the OA timestamp does not tick at the CS timestamp
frequency. Instead it ticks at a multiple that is determined from the
CTC_SHIFT value in RPM_CONFIG. Since the timestamp is used by UMD to
make sense of all the counters in the report, expose the OA timestamp
frequency to the user. The interface is generic and applies to all
platforms. On platforms where the bug is not present, this returns the
CS timestamp frequency. UMD specific changes consumed by GPUvis are:
https://patchwork.freedesktop.org/patch/504464/?series=107633&rev=5
Mesa MR: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18893
v2:
- Add review comments
- Update uapi changes in cover letter
- Drop patches for non-production platforms
drm/i915/perf: Use helpers to process reports w.r.t. OA buffer size
drm/i915/perf: Add Wa_16010703925:dg2
- Drop 64-bit OA format changes for now
drm/i915/perf: Parse 64bit report header formats correctly
drm/i915/perf: Add Wa_1608133521:dg2
v3:
- Add review comments to patches 02, 04, 05, 14
- Drop Acks
v4:
- Add review comments to patch 04
- Update R-bs
- Add MR links to patches 02 and 12
v5:
- Drop unrelated comment
- Rebase and fix MCR reg write
- On pre-gen12, EU flex config is saved/restored in the context image, so
save/restore EU flex config only for gen12.
v6:
- Fix checkpatch issues
Test-with: 20221025200709.83314-1-umesh.nerlige.ramappa at intel.com
Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa at intel.com>
Lionel Landwerlin (1):
drm/i915/perf: complete programming whitelisting for XEHPSDV
Umesh Nerlige Ramappa (14):
drm/i915/perf: Fix OA filtering logic for GuC mode
drm/i915/perf: Add 32-bit OAG and OAR formats for DG2
drm/i915/perf: Fix noa wait predication for DG2
drm/i915/perf: Determine gen12 oa ctx offset at runtime
drm/i915/perf: Enable bytes per clock reporting in OA
drm/i915/perf: Simply use stream->ctx
drm/i915/perf: Move gt-specific data from i915->perf to gt->perf
drm/i915/perf: Replace gt->perf.lock with stream->lock for file ops
drm/i915/perf: Use gt-specific ggtt for OA and noa-wait buffers
drm/i915/perf: Store a pointer to oa_format in oa_buffer
drm/i915/perf: Add Wa_1508761755:dg2
drm/i915/perf: Apply Wa_18013179988
drm/i915/perf: Save/restore EU flex counters across reset
drm/i915/perf: Enable OA for DG2
Vinay Belgaumkar (1):
drm/i915/guc: Support OA when Wa_16011777198 is enabled
drivers/gpu/drm/i915/gt/intel_engine_regs.h | 1 +
drivers/gpu/drm/i915/gt/intel_gpu_commands.h | 4 +
drivers/gpu/drm/i915/gt/intel_gt_regs.h | 1 +
drivers/gpu/drm/i915/gt/intel_gt_types.h | 3 +
drivers/gpu/drm/i915/gt/intel_lrc.h | 2 +
drivers/gpu/drm/i915/gt/intel_sseu.c | 4 +-
.../drm/i915/gt/uc/abi/guc_actions_slpc_abi.h | 9 +
drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c | 10 +
drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c | 66 ++
drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h | 2 +
drivers/gpu/drm/i915/i915_drv.h | 5 +
drivers/gpu/drm/i915/i915_getparam.c | 3 +
drivers/gpu/drm/i915/i915_pci.c | 2 +
drivers/gpu/drm/i915/i915_perf.c | 576 ++++++++++++++----
drivers/gpu/drm/i915/i915_perf.h | 2 +
drivers/gpu/drm/i915/i915_perf_oa_regs.h | 6 +-
drivers/gpu/drm/i915/i915_perf_types.h | 47 +-
drivers/gpu/drm/i915/intel_device_info.h | 2 +
drivers/gpu/drm/i915/selftests/i915_perf.c | 16 +-
include/uapi/drm/i915_drm.h | 10 +
20 files changed, 630 insertions(+), 141 deletions(-)
--
2.25.1
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