[Intel-gfx] [PATCH 0/2] drm/i915/psr: Disable PSR2 when SDP is sent on prior line

[Jouni Högander]

Selective update doesn't work if SU start address is 0 and start/end
SDP is configured to be sent prior to SU start/end lines. PSR2 has to
be disabled in this case for Alder Lake.

Additionally this patch set updates changed equation for sending
start/end SDP prior to the SU region start/end.

Cc: Mika Kahola <mika.kahola at intel.com>
Cc: José Roberto de Souza <jose.souza at intel.com>

Jouni Högander (2):
  drm/i915/psr: Equation changed for sending start/stop on prior line
  drm/i915/psr: Disable PSR2 when SDP is sent on prior line

 drivers/gpu/drm/i915/display/intel_psr.c | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

-- 
2.34.1