[Intel-gfx] [PATCH 1/4] drm: Add missing DP DSC extended capability definitions.
Jani Nikula
jani.nikula at intel.com
Tue Sep 6 15:43:22 UTC 2022
On Tue, 06 Sep 2022, Jani Nikula <jani.nikula at intel.com> wrote:
> On Mon, 05 Sep 2022, Stanislav Lisovskiy <stanislav.lisovskiy at intel.com> wrote:
>> Adding DP DSC register definitions, we might need for further
>> DSC implementation, supporting MST and DP branch pass-through mode.
>>
>> v2: - Fixed checkpatch comment warning
>> v3: - Removed function which is not yet used(Jani Nikula)
>>
>> Reviewed-by: Vinod Govindapillai <vinod.govindapillai at intel.com>
>>
>> Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy at intel.com>
>
> Maarten, Maxime, Thomas -
>
> So this got pushed to drm-intel-next without your acks. Apologies. Can
> we live with it, or want a revert?
I've reverted anyway for other reasons. But can we have an ack for the
future? :)
BR,
Jani.
>
>
> BR,
> Jani.
>
>
>> ---
>> include/drm/display/drm_dp.h | 10 +++++++++-
>> 1 file changed, 9 insertions(+), 1 deletion(-)
>>
>> diff --git a/include/drm/display/drm_dp.h b/include/drm/display/drm_dp.h
>> index 6c0871164771..02c4b6f20478 100644
>> --- a/include/drm/display/drm_dp.h
>> +++ b/include/drm/display/drm_dp.h
>> @@ -239,6 +239,9 @@
>>
>> #define DP_DSC_SUPPORT 0x060 /* DP 1.4 */
>> # define DP_DSC_DECOMPRESSION_IS_SUPPORTED (1 << 0)
>> +# define DP_DSC_PASS_THROUGH_IS_SUPPORTED (1 << 1)
>> +# define DP_DSC_DYNAMIC_PPS_UPDATE_SUPPORT_COMP_TO_COMP (1 << 2)
>> +# define DP_DSC_DYNAMIC_PPS_UPDATE_SUPPORT_UNCOMP_TO_COMP (1 << 3)
>>
>> #define DP_DSC_REV 0x061
>> # define DP_DSC_MAJOR_MASK (0xf << 0)
>> @@ -277,12 +280,15 @@
>>
>> #define DP_DSC_BLK_PREDICTION_SUPPORT 0x066
>> # define DP_DSC_BLK_PREDICTION_IS_SUPPORTED (1 << 0)
>> +# define DP_DSC_RGB_COLOR_CONV_BYPASS_SUPPORT (1 << 1)
>>
>> #define DP_DSC_MAX_BITS_PER_PIXEL_LOW 0x067 /* eDP 1.4 */
>>
>> #define DP_DSC_MAX_BITS_PER_PIXEL_HI 0x068 /* eDP 1.4 */
>> # define DP_DSC_MAX_BITS_PER_PIXEL_HI_MASK (0x3 << 0)
>> # define DP_DSC_MAX_BITS_PER_PIXEL_HI_SHIFT 8
>> +# define DP_DSC_MAX_BPP_DELTA_VERSION_MASK 0x06
>> +# define DP_DSC_MAX_BPP_DELTA_AVAILABILITY 0x08
>>
>> #define DP_DSC_DEC_COLOR_FORMAT_CAP 0x069
>> # define DP_DSC_RGB (1 << 0)
>> @@ -344,11 +350,13 @@
>> # define DP_DSC_24_PER_DP_DSC_SINK (1 << 2)
>>
>> #define DP_DSC_BITS_PER_PIXEL_INC 0x06F
>> +# define DP_DSC_RGB_YCbCr444_MAX_BPP_DELTA_MASK 0x1f
>> +# define DP_DSC_RGB_YCbCr420_MAX_BPP_DELTA_MASK 0xe0
>> # define DP_DSC_BITS_PER_PIXEL_1_16 0x0
>> # define DP_DSC_BITS_PER_PIXEL_1_8 0x1
>> # define DP_DSC_BITS_PER_PIXEL_1_4 0x2
>> # define DP_DSC_BITS_PER_PIXEL_1_2 0x3
>> -# define DP_DSC_BITS_PER_PIXEL_1 0x4
>> +# define DP_DSC_BITS_PER_PIXEL_1_1 0x4
>>
>> #define DP_PSR_SUPPORT 0x070 /* XXX 1.2? */
>> # define DP_PSR_IS_SUPPORTED 1
--
Jani Nikula, Intel Open Source Graphics Center
More information about the Intel-gfx
mailing list