[Intel-gfx] [PATCH 1/2] drm/i915/gt: Use MEDIA_VER() when handling media fuses

Lucas De Marchi lucas.demarchi at intel.com
Wed Sep 7 22:22:38 UTC 2022


On Wed, Sep 07, 2022 at 03:18:00PM -0700, Matt Roper wrote:
>On Wed, Sep 07, 2022 at 01:39:10PM -0700, Lucas De Marchi wrote:
>> Check for media IP version instead of graphics since this is figuring
>> out the media engines' configuration. Currently the only platform with
>> non-matching graphics/media version is Meteor Lake: update the check in
>> gen11_vdbox_has_sfc() so it considers not only version 12, but also any
>> later version which then includes that platform.
>>
>> Cc: Matt Roper <matthew.d.roper at intel.com>
>> Signed-off-by: Lucas De Marchi <lucas.demarchi at intel.com>
>> ---
>>  drivers/gpu/drm/i915/gt/intel_engine_cs.c | 11 ++++++-----
>>  1 file changed, 6 insertions(+), 5 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
>> index 275ad72940c1..5cddee7c2f1d 100644
>> --- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
>> +++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
>> @@ -654,13 +654,14 @@ bool gen11_vdbox_has_sfc(struct intel_gt *gt,
>>  	 */
>>  	if ((gt->info.sfc_mask & BIT(physical_vdbox / 2)) == 0)
>>  		return false;
>> -	else if (GRAPHICS_VER(i915) == 12)
>> +	else if (MEDIA_VER(i915) >= 12)
>>  		return (physical_vdbox % 2 == 0) ||
>>  			!(BIT(physical_vdbox - 1) & vdbox_mask);
>> -	else if (GRAPHICS_VER(i915) == 11)
>> +	else if (MEDIA_VER(i915) == 11)
>>  		return logical_vdbox % 2 == 0;
>>
>> -	MISSING_CASE(GRAPHICS_VER(i915));
>> +	MISSING_CASE(MEDIA_VER(i915));
>
>Do we even still need the MISSING_CASE given that we now have an
>open-ended upper bound above and this is a "gen11" function that doesn't
>get called at all on old platforms?
>
>Personally I'd axe it, but up to you.  Either way,
>
>Reviewed-by: Matt Roper <matthew.d.roper at intel.com>

yeah, I will remove it

thanks
Lucas De Marchi

>
>> +
>>  	return false;
>>  }
>>
>> @@ -747,14 +748,14 @@ static intel_engine_mask_t init_engine_mask(struct intel_gt *gt)
>>  	 * and bits have disable semantices.
>>  	 */
>>  	media_fuse = intel_uncore_read(uncore, GEN11_GT_VEBOX_VDBOX_DISABLE);
>> -	if (GRAPHICS_VER_FULL(i915) < IP_VER(12, 50))
>> +	if (MEDIA_VER_FULL(i915) < IP_VER(12, 50))
>>  		media_fuse = ~media_fuse;
>>
>>  	vdbox_mask = media_fuse & GEN11_GT_VDBOX_DISABLE_MASK;
>>  	vebox_mask = (media_fuse & GEN11_GT_VEBOX_DISABLE_MASK) >>
>>  		      GEN11_GT_VEBOX_DISABLE_SHIFT;
>>
>> -	if (GRAPHICS_VER_FULL(i915) >= IP_VER(12, 50)) {
>> +	if (MEDIA_VER_FULL(i915) >= IP_VER(12, 50)) {
>>  		fuse1 = intel_uncore_read(uncore, HSW_PAVP_FUSE1);
>>  		gt->info.sfc_mask = REG_FIELD_GET(XEHP_SFC_ENABLE_MASK, fuse1);
>>  	} else {
>> --
>> 2.37.2
>>
>
>-- 
>Matt Roper
>Graphics Software Engineer
>VTT-OSGC Platform Enablement
>Intel Corporation


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