[Intel-gfx] [PATCH 7/8] drm/i915/mtl: PERF_LIMIT_REASONS changes for MTL

[Rodrigo Vivi]

On Wed, Sep 07, 2022 at 10:23:38PM -0700, Ashutosh Dixit wrote:
> PERF_LIMIT_REASONS register for MTL media gt is different now.
> 
> v2: Avoid static inline for intel_gt_perf_limit_reasons_reg() (Jani)
> 
> Cc: Jani Nikula <jani.nikula at linux.intel.com>
> Cc: Badal Nilawar <badal.nilawar at intel.com>
> Signed-off-by: Ashutosh Dixit <ashutosh.dixit at intel.com>

Reviewed-by: Rodrigo Vivi <rodrigo.vivi at intel.com>
> ---
>  drivers/gpu/drm/i915/gt/intel_gt.c            | 6 ++++++
>  drivers/gpu/drm/i915/gt/intel_gt.h            | 1 +
>  drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c | 4 ++--
>  drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c   | 6 +++---
>  drivers/gpu/drm/i915/i915_reg.h               | 1 +
>  5 files changed, 13 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c
> index 070068524a19..602d711d3c9e 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt.c
> +++ b/drivers/gpu/drm/i915/gt/intel_gt.c
> @@ -224,6 +224,12 @@ static void gen6_clear_engine_error_register(struct intel_engine_cs *engine)
>  	GEN6_RING_FAULT_REG_POSTING_READ(engine);
>  }
>  
> +i915_reg_t intel_gt_perf_limit_reasons_reg(struct intel_gt *gt)
> +{
> +	return gt->type == GT_MEDIA ?
> +		MTL_MEDIA_PERF_LIMIT_REASONS : GT0_PERF_LIMIT_REASONS;
> +}
> +
>  void
>  intel_gt_clear_error_registers(struct intel_gt *gt,
>  			       intel_engine_mask_t engine_mask)
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt.h b/drivers/gpu/drm/i915/gt/intel_gt.h
> index c9a359f35d0f..b6509d3e8804 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt.h
> +++ b/drivers/gpu/drm/i915/gt/intel_gt.h
> @@ -60,6 +60,7 @@ void intel_gt_driver_late_release_all(struct drm_i915_private *i915);
>  int intel_gt_wait_for_idle(struct intel_gt *gt, long timeout);
>  
>  void intel_gt_check_and_clear_faults(struct intel_gt *gt);
> +i915_reg_t intel_gt_perf_limit_reasons_reg(struct intel_gt *gt);
>  void intel_gt_clear_error_registers(struct intel_gt *gt,
>  				    intel_engine_mask_t engine_mask);
>  
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c b/drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c
> index a009cf69103a..68310881a793 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c
> +++ b/drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c
> @@ -661,7 +661,7 @@ static int perf_limit_reasons_get(void *data, u64 *val)
>  	intel_wakeref_t wakeref;
>  
>  	with_intel_runtime_pm(gt->uncore->rpm, wakeref)
> -		*val = intel_uncore_read(gt->uncore, GT0_PERF_LIMIT_REASONS);
> +		*val = intel_uncore_read(gt->uncore, intel_gt_perf_limit_reasons_reg(gt));
>  
>  	return 0;
>  }
> @@ -677,7 +677,7 @@ static int perf_limit_reasons_clear(void *data, u64 val)
>  	 * "status" bits except that the "log" bits remain set until cleared.
>  	 */
>  	with_intel_runtime_pm(gt->uncore->rpm, wakeref)
> -		intel_uncore_rmw(gt->uncore, GT0_PERF_LIMIT_REASONS,
> +		intel_uncore_rmw(gt->uncore, intel_gt_perf_limit_reasons_reg(gt),
>  				 GT0_PERF_LIMIT_REASONS_LOG_MASK, 0);
>  
>  	return 0;
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c b/drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c
> index e066cc33d9f2..54deae45d81f 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c
> +++ b/drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c
> @@ -510,7 +510,7 @@ struct intel_gt_bool_throttle_attr {
>  	struct attribute attr;
>  	ssize_t (*show)(struct device *dev, struct device_attribute *attr,
>  			char *buf);
> -	i915_reg_t reg32;
> +	i915_reg_t (*reg32)(struct intel_gt *gt);
>  	u32 mask;
>  };
>  
> @@ -521,7 +521,7 @@ static ssize_t throttle_reason_bool_show(struct device *dev,
>  	struct intel_gt *gt = intel_gt_sysfs_get_drvdata(dev, attr->attr.name);
>  	struct intel_gt_bool_throttle_attr *t_attr =
>  				(struct intel_gt_bool_throttle_attr *) attr;
> -	bool val = rps_read_mask_mmio(&gt->rps, t_attr->reg32, t_attr->mask);
> +	bool val = rps_read_mask_mmio(&gt->rps, t_attr->reg32(gt), t_attr->mask);
>  
>  	return sysfs_emit(buff, "%u\n", val);
>  }
> @@ -530,7 +530,7 @@ static ssize_t throttle_reason_bool_show(struct device *dev,
>  struct intel_gt_bool_throttle_attr attr_##sysfs_func__ = { \
>  	.attr = { .name = __stringify(sysfs_func__), .mode = 0444 }, \
>  	.show = throttle_reason_bool_show, \
> -	.reg32 = GT0_PERF_LIMIT_REASONS, \
> +	.reg32 = intel_gt_perf_limit_reasons_reg, \
>  	.mask = mask__, \
>  }
>  
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 9492f8f43b25..10a89d869b00 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -1803,6 +1803,7 @@
>  #define   POWER_LIMIT_1_MASK		REG_BIT(10)
>  #define   POWER_LIMIT_2_MASK		REG_BIT(11)
>  #define   GT0_PERF_LIMIT_REASONS_LOG_MASK REG_GENMASK(31, 16)
> +#define MTL_MEDIA_PERF_LIMIT_REASONS	_MMIO(0x138030)
>  
>  #define CHV_CLK_CTL1			_MMIO(0x101100)
>  #define VLV_CLK_CTL2			_MMIO(0x101104)
> -- 
> 2.34.1
>