[Intel-gfx] [PATCH] drm/i915/debugfs: Fix perf_limit_reasons debugfs

Dixit, Ashutosh ashutosh.dixit at intel.com
Mon Sep 19 03:14:14 UTC 2022


On Fri, 16 Sep 2022 20:15:01 -0700, Ashutosh Dixit wrote:
>
> Register GT0_PERF_LIMIT_REASONS (0x1381a8) is available only for Gen11+.

PLEASE IGNORE THIS PATCH. I will submit a different patch for this issue.

Thanks.
--
Ashutosh

> On Gen < 5 igt at debugfs_test@read_all_entries results in the following oops:
>
> <1> [88.829420] BUG: unable to handle page fault for address: ffffc90000bb81a8
> <1> [88.829438] #PF: supervisor read access in kernel mode
> <1> [88.829447] #PF: error_code(0x0000) - not-present page
>
> Bspec: 20008
> Fixes: fe5979665f64 ("drm/i915/debugfs: Add perf_limit_reasons in debugfs")
> Signed-off-by: Ashutosh Dixit <ashutosh.dixit at intel.com>
> ---
>  drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c | 6 ++++++
>  1 file changed, 6 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c b/drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c
> index 68310881a793..e7f057821cd0 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c
> +++ b/drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c
> @@ -660,6 +660,9 @@ static int perf_limit_reasons_get(void *data, u64 *val)
>	struct intel_gt *gt = data;
>	intel_wakeref_t wakeref;
>
> +	if (GRAPHICS_VER(gt->i915) < 11)
> +		return 0;
> +
>	with_intel_runtime_pm(gt->uncore->rpm, wakeref)
>		*val = intel_uncore_read(gt->uncore, intel_gt_perf_limit_reasons_reg(gt));
>
> @@ -671,6 +674,9 @@ static int perf_limit_reasons_clear(void *data, u64 val)
>	struct intel_gt *gt = data;
>	intel_wakeref_t wakeref;
>
> +	if (GRAPHICS_VER(gt->i915) < 11)
> +		return 0;
> +
>	/*
>	 * Clear the upper 16 "log" bits, the lower 16 "status" bits are
>	 * read-only. The upper 16 "log" bits are identical to the lower 16
> --
> 2.34.1
>


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