[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: HuC loading for DG2 (rev8)

[Patchwork]

== Series Details ==

Series: drm/i915: HuC loading for DG2 (rev8)
URL   : https://patchwork.freedesktop.org/series/107477/
State : warning

== Summary ==

Error: dim checkpatch failed
a0add1869506 mei: add support to GSC extended header
395edf1bb64a mei: bus: enable sending gsc commands
8ea5f3e6ff7f mei: adjust extended header kdocs
2a9b27d63a32 mei: bus: extend bus API to support command streamer API
86d07907d2e4 mei: pxp: add command streamer API to the PXP driver
25a7ab2a1e35 mei: pxp: support matching with a gfx discrete card
612ad1fcc701 drm/i915/pxp: load the pxp module when we have a gsc-loaded huc
0220f8a54e52 drm/i915/pxp: implement function for sending tee stream command
c0d8f94234ad drm/i915/pxp: add huc authentication and loading command
Traceback (most recent call last):
  File "scripts/spdxcheck.py", line 6, in <module>
    from ply import lex, yacc
ModuleNotFoundError: No module named 'ply'
Traceback (most recent call last):
  File "scripts/spdxcheck.py", line 6, in <module>
    from ply import lex, yacc
ModuleNotFoundError: No module named 'ply'
-:33: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#33: 
new file mode 100644

total: 0 errors, 1 warnings, 0 checks, 131 lines checked
757199337089 drm/i915/dg2: setup HuC loading via GSC
dd297281739d drm/i915/huc: track delayed HuC load with a fence
337e3c5be3d3 drm/i915/huc: stall media submission until HuC is loaded
cbac9f41c06d drm/i915/huc: better define HuC status getparam possible return values.
b732098efd9a drm/i915/huc: define gsc-compatible HuC fw for DG2
-:29: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses
#29: FILE: drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:96:
+#define INTEL_HUC_FIRMWARE_DEFS(fw_def, huc_raw, huc_mmp, huc_gsc) \
+	fw_def(DG2,          0, huc_gsc(dg2)) \
 	fw_def(ALDERLAKE_P,  0, huc_raw(tgl)) \
 	fw_def(ALDERLAKE_P,  0, huc_mmp(tgl,  7, 9, 3)) \
 	fw_def(ALDERLAKE_S,  0, huc_raw(tgl)) \

-:29: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'fw_def' - possible side-effects?
#29: FILE: drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:96:
+#define INTEL_HUC_FIRMWARE_DEFS(fw_def, huc_raw, huc_mmp, huc_gsc) \
+	fw_def(DG2,          0, huc_gsc(dg2)) \
 	fw_def(ALDERLAKE_P,  0, huc_raw(tgl)) \
 	fw_def(ALDERLAKE_P,  0, huc_mmp(tgl,  7, 9, 3)) \
 	fw_def(ALDERLAKE_S,  0, huc_raw(tgl)) \

-:29: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'huc_raw' - possible side-effects?
#29: FILE: drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:96:
+#define INTEL_HUC_FIRMWARE_DEFS(fw_def, huc_raw, huc_mmp, huc_gsc) \
+	fw_def(DG2,          0, huc_gsc(dg2)) \
 	fw_def(ALDERLAKE_P,  0, huc_raw(tgl)) \
 	fw_def(ALDERLAKE_P,  0, huc_mmp(tgl,  7, 9, 3)) \
 	fw_def(ALDERLAKE_S,  0, huc_raw(tgl)) \

-:49: WARNING:LONG_LINE: line length of 111 exceeds 100 columns
#49: FILE: drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:160:
+INTEL_HUC_FIRMWARE_DEFS(INTEL_UC_MODULE_FW, MAKE_HUC_FW_PATH_BLANK, MAKE_HUC_FW_PATH_MMP, MAKE_HUC_FW_PATH_GSC)

total: 1 errors, 1 warnings, 2 checks, 83 lines checked
8f4f1eb4a062 HAX: drm/i915: force INTEL_MEI_GSC and INTEL_MEI_PXP on for CI