[Intel-gfx] [PATCH] drm/i915/ehl: Update MOCS table for EHL

[Matthew Auld]

On 30/09/2022 14:32, Tejas Upadhyay wrote:
> Add these extra EHL entries back since we have
> drm-tip commit 13d29c823738
> ("drm/i915/ehl: unconditionally flush the pages on acquire")
> introduces proper flushing to make it work as expected.
> 
> Cc: Chris Wilson <chris.p.wilson at intel.com>
> Cc: Matthew Auld <matthew.auld at intel.com>
> Fixes: 046091758b50 ("Revert "drm/i915/ehl: Update MOCS table for EHL"")
> Signed-off-by: Matt Roper <matthew.d.roper at intel.com>
> Signed-off-by: Tejas Upadhyay <tejas.upadhyay at intel.com>

Acked-by: Matthew Auld <matthew.auld at intel.com>

> ---
>   drivers/gpu/drm/i915/gt/intel_mocs.c | 8 ++++++++
>   1 file changed, 8 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/gt/intel_mocs.c b/drivers/gpu/drm/i915/gt/intel_mocs.c
> index c6ebe2781076..152244d7f62a 100644
> --- a/drivers/gpu/drm/i915/gt/intel_mocs.c
> +++ b/drivers/gpu/drm/i915/gt/intel_mocs.c
> @@ -207,6 +207,14 @@ static const struct drm_i915_mocs_entry broxton_mocs_table[] = {
>   	MOCS_ENTRY(15, \
>   		   LE_3_WB | LE_TC_1_LLC | LE_LRUM(2) | LE_AOM(1), \
>   		   L3_3_WB), \
> +	/* Bypass LLC - Uncached (EHL+) */ \
> +	MOCS_ENTRY(16, \
> +		   LE_1_UC | LE_TC_1_LLC | LE_SCF(1), \
> +		   L3_1_UC), \
> +	/* Bypass LLC - L3 (Read-Only) (EHL+) */ \
> +	MOCS_ENTRY(17, \
> +		   LE_1_UC | LE_TC_1_LLC | LE_SCF(1), \
> +		   L3_3_WB), \
>   	/* Self-Snoop - L3 + LLC */ \
>   	MOCS_ENTRY(18, \
>   		   LE_3_WB | LE_TC_1_LLC | LE_LRUM(3) | LE_SSE(3), \