[Intel-gfx] [PATCH 11/15] drm/i915: Rename skl+ scaler binding bits
kernel test robot
lkp at intel.com
Tue Apr 18 22:06:17 UTC 2023
Hi Ville,
kernel test robot noticed the following build errors:
[auto build test ERROR on drm-tip/drm-tip]
url: https://github.com/intel-lab-lkp/linux/commits/Ville-Syrjala/drm-i915-Check-pipe-source-size-when-using-skl-scalers/20230419-015829
base: git://anongit.freedesktop.org/drm/drm-tip drm-tip
patch link: https://lore.kernel.org/r/20230418175528.13117-12-ville.syrjala%40linux.intel.com
patch subject: [Intel-gfx] [PATCH 11/15] drm/i915: Rename skl+ scaler binding bits
config: x86_64-allyesconfig (https://download.01.org/0day-ci/archive/20230419/202304190547.OlyNaAi3-lkp@intel.com/config)
compiler: gcc-11 (Debian 11.3.0-8) 11.3.0
reproduce (this is a W=1 build):
# https://github.com/intel-lab-lkp/linux/commit/19871303e2971d47d4ac0557533295744c04cfd4
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review Ville-Syrjala/drm-i915-Check-pipe-source-size-when-using-skl-scalers/20230419-015829
git checkout 19871303e2971d47d4ac0557533295744c04cfd4
# save the config file
mkdir build_dir && cp config build_dir/.config
make W=1 O=build_dir ARCH=x86_64 olddefconfig
make W=1 O=build_dir ARCH=x86_64 SHELL=/bin/bash drivers/gpu/
If you fix the issue, kindly add following tag where applicable
| Reported-by: kernel test robot <lkp at intel.com>
| Link: https://lore.kernel.org/oe-kbuild-all/202304190547.OlyNaAi3-lkp@intel.com/
All errors (new ones prefixed by >>):
drivers/gpu/drm/i915/gvt/handlers.c: In function 'pf_write':
>> drivers/gpu/drm/i915/gvt/handlers.c:1565:45: error: 'PS_PLANE_SEL_MASK' undeclared (first use in this function); did you mean 'PS_PHASE_MASK'?
1565 | offset == _PS_1C_CTRL) && (val & PS_PLANE_SEL_MASK) != 0) {
| ^~~~~~~~~~~~~~~~~
| PS_PHASE_MASK
drivers/gpu/drm/i915/gvt/handlers.c:1565:45: note: each undeclared identifier is reported only once for each function it appears in
vim +1565 drivers/gpu/drm/i915/gvt/handlers.c
e39c5add322184 Zhi Wang 2016-09-02 1556
04d348ae3f0aea Zhi Wang 2016-04-25 1557 static int pf_write(struct intel_vgpu *vgpu,
04d348ae3f0aea Zhi Wang 2016-04-25 1558 unsigned int offset, void *p_data, unsigned int bytes)
04d348ae3f0aea Zhi Wang 2016-04-25 1559 {
a61ac1e75105a0 Chris Wilson 2020-03-06 1560 struct drm_i915_private *i915 = vgpu->gvt->gt->i915;
04d348ae3f0aea Zhi Wang 2016-04-25 1561 u32 val = *(u32 *)p_data;
04d348ae3f0aea Zhi Wang 2016-04-25 1562
04d348ae3f0aea Zhi Wang 2016-04-25 1563 if ((offset == _PS_1A_CTRL || offset == _PS_2A_CTRL ||
04d348ae3f0aea Zhi Wang 2016-04-25 1564 offset == _PS_1B_CTRL || offset == _PS_2B_CTRL ||
04d348ae3f0aea Zhi Wang 2016-04-25 @1565 offset == _PS_1C_CTRL) && (val & PS_PLANE_SEL_MASK) != 0) {
12d5861973c70f Pankaj Bharadiya 2020-02-20 1566 drm_WARN_ONCE(&i915->drm, true,
12d5861973c70f Pankaj Bharadiya 2020-02-20 1567 "VM(%d): guest is trying to scaling a plane\n",
04d348ae3f0aea Zhi Wang 2016-04-25 1568 vgpu->id);
04d348ae3f0aea Zhi Wang 2016-04-25 1569 return 0;
04d348ae3f0aea Zhi Wang 2016-04-25 1570 }
04d348ae3f0aea Zhi Wang 2016-04-25 1571
04d348ae3f0aea Zhi Wang 2016-04-25 1572 return intel_vgpu_default_mmio_write(vgpu, offset, p_data, bytes);
04d348ae3f0aea Zhi Wang 2016-04-25 1573 }
04d348ae3f0aea Zhi Wang 2016-04-25 1574
--
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