[Intel-gfx] [PATCH v3] drm/i915/xelpd: Calculate first_line_bpg_offset for DSC 1.1

[William Tseng]

This change is required for DSC 1.1 because the current calculation
is for DSC 1.2 and may get a calculated value which is not
recommended by DSC 1.1, for example, the calculated value at 8bpp
becomes 15, not the value of 12 recommened by DSC 1.1.

v2:
- change the if-condition from minor version 2 to 1.
- add comment about first_line_bpg_offset for DSC 1.1.
v3:
- change variable name from rc to vdsc_cfg.
- add Cc

Cc: Suraj Kandpal <suraj.kandpal at intel.com>
Cc: Ankit Nautiyal <ankit.k.nautiyal at intel.com>
Cc: Juha-Pekka Heikkil <juha-pekka.heikkila at intel.com>
Signed-off-by: William Tseng <william.tseng at intel.com>
---
 drivers/gpu/drm/i915/display/intel_vdsc.c | 18 +++++++++++++-----
 1 file changed, 13 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c
index bd9116d2cd76..c7db3bc94246 100644
--- a/drivers/gpu/drm/i915/display/intel_vdsc.c
+++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
@@ -72,11 +72,19 @@ calculate_rc_params(struct drm_dsc_config *vdsc_cfg)
 	int qp_bpc_modifier = (bpc - 8) * 2;
 	u32 res, buf_i, bpp_i;
 
-	if (vdsc_cfg->slice_height >= 8)
-		vdsc_cfg->first_line_bpg_offset =
-			12 + DIV_ROUND_UP((9 * min(34, vdsc_cfg->slice_height - 8)), 100);
-	else
-		vdsc_cfg->first_line_bpg_offset = 2 * (vdsc_cfg->slice_height - 1);
+	if (vdsc_cfg->dsc_version_minor == 1) {
+		/* The recommended and required Values from Table E-2 for DSC1.1 */
+		if (bpp == 8)
+			vdsc_cfg->first_line_bpg_offset = 12;
+		else
+			vdsc_cfg->first_line_bpg_offset = 15;
+	} else {
+		if (vdsc_cfg->slice_height >= 8)
+			vdsc_cfg->first_line_bpg_offset =
+				12 + DIV_ROUND_UP((9 * min(34, vdsc_cfg->slice_height - 8)), 100);
+		else
+			vdsc_cfg->first_line_bpg_offset = 2 * (vdsc_cfg->slice_height - 1);
+	}
 
 	/* Our hw supports only 444 modes as of today */
 	if (bpp >= 12)
-- 
2.34.1