[Intel-gfx] [PATCH] drm/i915/vdsc: Fix first_line_bpg_offset calculation

[Jani Nikula]

On Fri, 04 Aug 2023, Suraj Kandpal <suraj.kandpal at intel.com> wrote:
> On checking DSC1.1 Errata and DSC 1.2 spec the current formula
> we were using was incorrect to calculate first_line_bpg_offset.
> The new fixed formula is derived from C model.
>
> --v2
> -Use clamp function in linux/minmax.h [Ankit]
>
> --v3
> -remove linux/minmax.h header
>
> Signed-off-by: Suraj Kandpal <suraj.kandpal at intel.com>
> Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal at intel.com>

Should this be:

Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/9102

> ---
>  drivers/gpu/drm/i915/display/intel_vdsc.c | 12 +++++++++---
>  1 file changed, 9 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c
> index 9d76c2756784..e4c395b4dc46 100644
> --- a/drivers/gpu/drm/i915/display/intel_vdsc.c
> +++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
> @@ -80,13 +80,19 @@ calculate_rc_params(struct drm_dsc_config *vdsc_cfg)
>  	int bpc = vdsc_cfg->bits_per_component;
>  	int bpp = vdsc_cfg->bits_per_pixel >> 4;
>  	int qp_bpc_modifier = (bpc - 8) * 2;
> +	int uncompressed_bpg_rate;
> +	int first_line_bpg_offset;
>  	u32 res, buf_i, bpp_i;
>  
>  	if (vdsc_cfg->slice_height >= 8)
> -		vdsc_cfg->first_line_bpg_offset =
> -			12 + DIV_ROUND_UP((9 * min(34, vdsc_cfg->slice_height - 8)), 100);
> +		first_line_bpg_offset =
> +			12 + (9 * min(34, vdsc_cfg->slice_height - 8)) / 100;
>  	else
> -		vdsc_cfg->first_line_bpg_offset = 2 * (vdsc_cfg->slice_height - 1);
> +		first_line_bpg_offset = 2 * (vdsc_cfg->slice_height - 1);
> +
> +	uncompressed_bpg_rate = (3 * bpc + (vdsc_cfg->convert_rgb ? 0 : 2)) * 3;
> +	vdsc_cfg->first_line_bpg_offset = clamp(first_line_bpg_offset, 0,
> +						uncompressed_bpg_rate - 3 * bpp);
>  
>  	/*
>  	 * According to DSC 1.2 spec in Section 4.1 if native_420 is set:

-- 
Jani Nikula, Intel Open Source Graphics Center