[Intel-gfx] [PATCH v3 0/3] drm/i915/pxp/mtl: Update gsc-heci cmd submission to align with fw/hw spec
Alan Previn
alan.previn.teres.alexis at intel.com
Tue Aug 15 20:29:13 UTC 2023
For MTL, update the GSC-HECI packet size and the max firmware
response timeout to match internal fw specs. Enforce setting
run-alone bit in LRC for protected contexts.
Changes from prio revs:
v2: - Patch #3: fix sparse warning reported by kernel test robot.
v1: - N/A (Re-test)
Signed-off-by: Alan Previn <alan.previn.teres.alexis at intel.com>
Alan Previn (3):
drm/i915/pxp/mtl: Update pxp-firmware response timeout
drm/i915/pxp/mtl: Update pxp-firmware packet size
drm/i915/gt/pxp: User PXP contexts requires runalone bit in lrc
drivers/gpu/drm/i915/gt/intel_lrc.c | 25 +++++++++++++++++++
.../i915/gt/uc/intel_gsc_uc_heci_cmd_submit.c | 3 +++
.../drm/i915/pxp/intel_pxp_cmd_interface_43.h | 2 +-
drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.h | 6 ++---
4 files changed, 32 insertions(+), 4 deletions(-)
base-commit: 85f20fb339f05ec4221bb295c13e46061c5c566f
--
2.39.0
More information about the Intel-gfx
mailing list