[Intel-gfx] [PATCH 00/20] DSC misc fixes

[Jani Nikula]

On Thu, 10 Aug 2023, Ankit Nautiyal <ankit.k.nautiyal at intel.com> wrote:
> This series is an attempt to address multiple issues with DSC,
> scattered in separate existing series.

I think it's a good idea to have one person manage the series, and
combine it all together, because it touches the same areas.

However, once you have smaller batches of patches that are all reviewed,
send them out as smaller series, and get them merged. Re-sending and
rebasing ready patches as part of a 19-patch series where some patches
aren't ready has become counter-productive.

Getting patches upstream is like working on a machine that has a certain
peak throughput. Send patches one by one, and it's inefficient. Send too
many at once, and it bogs down. Personally, I think 5-10 non-trivial
patches at a time is about right, get them reviewed and merged, rebase
the rest locally, and again send the next 5-10.

Or you can initially send a longer series, but once the first 5-10 have
been reviewed, send them separately.


BR,
Jani.


>
> Patches 1-4 are DSC fixes from series to Handle BPC for HDMI2.1 PCON
> https://patchwork.freedesktop.org/series/107550/
>
> Patches 5-6 are from series DSC fixes for Bigjoiner:
> https://patchwork.freedesktop.org/series/115773/
>
> Patches 7-17 are based on series to add DSC fractional BPP support:
> https://patchwork.freedesktop.org/series/111391/
>
> Patch 20 is to fix compressed bpc for MST DSC, from Stan's series :
> https://patchwork.freedesktop.org/series/116179/
>
> Rev2: Addressed review comments from Stan, Ville.
>
> Rev3: Split larger patches. Separate out common helpers.
>
> Rev4: Rebased, fixed checkpatch warnings.
>
> Rev5: Addressed review comments from Stan.
> Added a patch to check if forced dsc format can be used before forcing.
>
> Rev6: Addressed review comments from Stan.
>
> Rev7: Reordered and rebased.
>
> Ankit Nautiyal (19):
>   drm/i915/dp: Consider output_format while computing dsc bpp
>   drm/i915/dp: Move compressed bpp check with 420 format inside the
>     helper
>   drm/i915/dp_mst: Use output_format to get the final link bpp
>   drm/i915/dp: Use consistent name for link bpp and compressed bpp
>   drm/i915/dp: Update Bigjoiner interface bits for computing compressed
>     bpp
>   drm/i915/intel_cdclk: Add vdsc with bigjoiner constraints on min_cdlck
>   drm/i915/dp: Remove extra logs for printing DSC info
>   drm/display/dp: Fix the DP DSC Receiver cap size
>   drm/i915/dp: Avoid forcing DSC BPC for MST case
>   drm/i915/dp: Add functions to get min/max src input bpc with DSC
>   drm/i915/dp: Check min bpc DSC limits for dsc_force_bpc also
>   drm/i915/dp: Avoid left shift of DSC output bpp by 4
>   drm/i915/dp: Rename helper to get DSC max pipe_bpp
>   drm/i915/dp: Separate out functions for edp/DP for computing DSC bpp
>   drm/i915/dp: Add DSC BPC/BPP constraints while selecting pipe bpp with
>     DSC
>   drm/i915/dp: Separate out function to get compressed bpp with joiner
>   drm/i915/dp: Get optimal link config to have best compressed bpp
>   drm/i915/dp: Check src/sink compressed bpp limit for edp
>   drm/i915/dp: Check if force_dsc_output_format is possible
>
> Stanislav Lisovskiy (1):
>   drm/i915: Query compressed bpp properly using correct DPCD and DP Spec
>     info
>
>  drivers/gpu/drm/i915/display/intel_cdclk.c  |  59 +-
>  drivers/gpu/drm/i915/display/intel_dp.c     | 655 ++++++++++++++++----
>  drivers/gpu/drm/i915/display/intel_dp.h     |  20 +-
>  drivers/gpu/drm/i915/display/intel_dp_mst.c |  80 +--
>  include/drm/display/drm_dp.h                |   2 +-
>  5 files changed, 625 insertions(+), 191 deletions(-)

-- 
Jani Nikula, Intel Open Source Graphics Center