[Intel-gfx] [PATCH v3 0/4] drm/i915/tc: some clean-ups in max lane count handling code

[Kandpal, Suraj]

0/4] drm/i915/tc: some clean-ups in max
> lane count handling code
> 
> On Fri, Jul 21, 2023 at 02:11:17PM +0300, Luca Coelho wrote:
> >Hi,
> >
> >Here are four patches with some clean-ups in the code that handles the
> >max lane count of Type-C connections.
> >
> >This is done mostly in preparation for a new way to read the pin
> >assignments and lane count in future devices.
> >
> >In v2:
> >   * Fix some rebasing damage.
> >
> >In v3:
> >   * Fixed "assigment" typo, as reported by checkpatch.
> >
> >Please review.
> 
> what happened to this series? It seems only the last patch is not reviewed.
> Are you going to submit a rebased version?
> 

So I had some review comments on patch 3 was waiting for Luciano to upstream
the latest changes then review the 4th patch

Regards,
Suraj Kandpal

> 
> Lucas De Marchi