[Intel-gfx] [PATCH] drm/display/dp: Fix the DP DSC Receiver cap size

[Jani Nikula]

On Fri, 18 Aug 2023, Ankit Nautiyal <ankit.k.nautiyal at intel.com> wrote:
> DP DSC Receiver Capabilities are exposed via DPCD 60h-6Fh.
> Fix the DSC RECEIVER CAP SIZE accordingly.
>
> Fixes: ffddc4363c28 ("drm/dp: Add DP DSC DPCD receiver capability size define and missing SHIFT")
> Cc: Anusha Srivatsa <anusha.srivatsa at intel.com>
> Cc: Manasi Navare <manasi.d.navare at intel.com>
> Cc: <stable at vger.kernel.org> # v5.0+
>
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal at intel.com>
> Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy at intel.com>

Thanks for the patch and review, pushed to drm-misc-fixes.

BR,
Jani.

> ---
>  include/drm/display/drm_dp.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/include/drm/display/drm_dp.h b/include/drm/display/drm_dp.h
> index 02f2ac4dd2df..e69cece404b3 100644
> --- a/include/drm/display/drm_dp.h
> +++ b/include/drm/display/drm_dp.h
> @@ -1537,7 +1537,7 @@ enum drm_dp_phy {
>  
>  #define DP_BRANCH_OUI_HEADER_SIZE	0xc
>  #define DP_RECEIVER_CAP_SIZE		0xf
> -#define DP_DSC_RECEIVER_CAP_SIZE        0xf
> +#define DP_DSC_RECEIVER_CAP_SIZE        0x10 /* DSC Capabilities 0x60 through 0x6F */
>  #define EDP_PSR_RECEIVER_CAP_SIZE	2
>  #define EDP_DISPLAY_CTL_CAP_SIZE	3
>  #define DP_LTTPR_COMMON_CAP_SIZE	8

-- 
Jani Nikula, Intel Open Source Graphics Center