[Intel-gfx] [PATCH v3 2/4] drm/i915/psr: Clear frontbuffer busy bits on flip
Jouni Högander
jouni.hogander at intel.com
Wed Aug 30 08:02:17 UTC 2023
We are planning to move flush performed from work queue. This
means it is possible to have invalidate -> flip -> flush sequence.
Handle this by clearing possible busy bits on flip.
Signed-off-by: Jouni Högander <jouni.hogander at intel.com>
---
drivers/gpu/drm/i915/display/intel_psr.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 72887c29fb51..887d0b77ae9a 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -2230,6 +2230,12 @@ static void _intel_psr_post_plane_update(const struct intel_atomic_state *state,
if (crtc_state->crc_enabled && psr->enabled)
psr_force_hw_tracking_exit(intel_dp);
+ /*
+ * Clear possible busy bits in case we have
+ * invalidate -> flip -> flush sequence.
+ */
+ intel_dp->psr.busy_frontbuffer_bits = 0;
+
mutex_unlock(&psr->lock);
}
}
--
2.34.1
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