[PATCH] drm/i915/mtl: Fix HDMI/DP PLL clock selection

[Sripada, Radhakrishna]

> -----Original Message-----
> From: Deak, Imre <imre.deak at intel.com>
> Sent: Wednesday, December 13, 2023 2:05 PM
> To: intel-gfx at lists.freedesktop.org
> Cc: Kahola, Mika <mika.kahola at intel.com>; Sripada, Radhakrishna
> <radhakrishna.sripada at intel.com>
> Subject: [PATCH] drm/i915/mtl: Fix HDMI/DP PLL clock selection
> 
> Select the HDMI specific PLL clock only for HDMI outputs.
> 
> Fixes: 62618c7f117e ("drm/i915/mtl: C20 PLL programming")
> Cc: Mika Kahola <mika.kahola at intel.com>
> Cc: Radhakrishna Sripada <radhakrishna.sripada at intel.com>

LGTM,
Reviewed-by: Radhakrishna Sripada <radhakrishna.sripada at intel.com>

> Signed-off-by: Imre Deak <imre.deak at intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_cx0_phy.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.c
> b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
> index 4e6ea71ff6294..884a1da360893 100644
> --- a/drivers/gpu/drm/i915/display/intel_cx0_phy.c
> +++ b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
> @@ -2468,7 +2468,8 @@ static void intel_program_port_clock_ctl(struct
> intel_encoder *encoder,
> 
>  	val |= XELPDP_FORWARD_CLOCK_UNGATE;
> 
> -	if (is_hdmi_frl(crtc_state->port_clock))
> +	if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI) &&
> +	    is_hdmi_frl(crtc_state->port_clock))
>  		val |=
> XELPDP_DDI_CLOCK_SELECT(XELPDP_DDI_CLOCK_SELECT_DIV18CLK);
>  	else
>  		val |=
> XELPDP_DDI_CLOCK_SELECT(XELPDP_DDI_CLOCK_SELECT_MAXPCLK);
> --
> 2.39.2