[Intel-gfx] [PATCH 1/2] drm/i915/gt: Ensure memory quiesced before invalidation
Jonathan Cavitt
jonathan.cavitt at intel.com
Tue Feb 21 22:13:08 UTC 2023
All memory traffic must be quiesced before requesting
an aux invalidation on platforms that use Aux CCS.
Signed-off-by: Jonathan Cavitt <jonathan.cavitt at intel.com>
---
drivers/gpu/drm/i915/gt/gen8_engine_cs.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/gen8_engine_cs.c b/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
index e1c76e5bfa82..6f830f80eb0f 100644
--- a/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
@@ -181,6 +181,13 @@ int gen12_emit_flush_rcs(struct i915_request *rq, u32 mode)
{
struct intel_engine_cs *engine = rq->engine;
+ /*
+ * Aux invalidations on Aux CCS platforms require
+ * memory traffic is quiesced prior.
+ */
+ if (!HAS_FLAT_CCS(engine->i915))
+ mode |= EMIT_FLUSH;
+
if (mode & EMIT_FLUSH) {
u32 flags = 0;
u32 *cs;
--
2.25.1
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