[Intel-gfx] [PATCH] drm/i915: Use correct huge page manager for MTL

Matthew Auld matthew.auld at intel.com
Wed Feb 22 15:56:23 UTC 2023


On 22/02/2023 15:26, Jonathan Cavitt wrote:
> MTL currently uses gen8_ppgtt_insert_huge when managing huge pages.  This is because
> MTL reports as not supporting 64K pages, or more accurately, the system that reports
> whether a platform has 64K pages reports false for MTL.  This is only half correct,
> as the 64K page support reporting system only cares about 64K page support for LMEM,
> which MTL doesn't have.
> 
> MTL should be using xehpsdv_ppgtt_insert_huge.  However, simply changing over to
> using that manager doesn't resolve the issue because MTL is expecting the virtual
> address space for the page table to be flushed after initialization, so we must also
> add a flush statement there.
> 
> The changes made to the huge page manager selection indirectly impacted some of the
> mock hugepage selftests.  Due to the use of pte level hints, rather than pde level
> hints, we now expect 64K page sizes to be properly reported by the GTT, so we should
> remove the check that asserts otherwise.
> 
> Signed-off-by: Jonathan Cavitt <jonathan.cavitt at intel.com>

Hopefully CI will be happy now,
Reviewed-by: Matthew Auld <matthew.auld at intel.com>

> ---
>   drivers/gpu/drm/i915/gem/selftests/huge_pages.c | 3 ---
>   drivers/gpu/drm/i915/gt/gen8_ppgtt.c            | 3 ++-
>   2 files changed, 2 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/gem/selftests/huge_pages.c b/drivers/gpu/drm/i915/gem/selftests/huge_pages.c
> index defece0bcb81..1659ada4ce33 100644
> --- a/drivers/gpu/drm/i915/gem/selftests/huge_pages.c
> +++ b/drivers/gpu/drm/i915/gem/selftests/huge_pages.c
> @@ -784,9 +784,6 @@ static int igt_mock_ppgtt_huge_fill(void *arg)
>   		GEM_BUG_ON(!expected_gtt);
>   		GEM_BUG_ON(size);
>   
> -		if (expected_gtt & I915_GTT_PAGE_SIZE_4K)
> -			expected_gtt &= ~I915_GTT_PAGE_SIZE_64K;
> -
>   		i915_vma_unpin(vma);
>   
>   		if (vma->page_sizes.sg & I915_GTT_PAGE_SIZE_64K) {
> diff --git a/drivers/gpu/drm/i915/gt/gen8_ppgtt.c b/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
> index 4daaa6f55668..9c571185395f 100644
> --- a/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
> +++ b/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
> @@ -570,6 +570,7 @@ xehpsdv_ppgtt_insert_huge(struct i915_address_space *vm,
>   			}
>   		} while (rem >= page_size && index < max);
>   
> +		drm_clflush_virt_range(vaddr, PAGE_SIZE);
>   		vma_res->page_sizes_gtt |= page_size;
>   	} while (iter->sg && sg_dma_len(iter->sg));
>   }
> @@ -707,7 +708,7 @@ static void gen8_ppgtt_insert(struct i915_address_space *vm,
>   	struct sgt_dma iter = sgt_dma(vma_res);
>   
>   	if (vma_res->bi.page_sizes.sg > I915_GTT_PAGE_SIZE) {
> -		if (HAS_64K_PAGES(vm->i915))
> +		if (GRAPHICS_VER_FULL(vm->i915) >= IP_VER(12, 50))
>   			xehpsdv_ppgtt_insert_huge(vm, vma_res, &iter, cache_level, flags);
>   		else
>   			gen8_ppgtt_insert_huge(vm, vma_res, &iter, cache_level, flags);


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