[Intel-gfx] [PATCH v2] drm/i915/display: assume some pixelrate for src smaller than 1

[Juha-Pekka Heikkila]

intel_adjusted_rate() didn't take into account src rectangle
can be less than 1 in with or height.

Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila at gmail.com>
---
 drivers/gpu/drm/i915/display/intel_atomic_plane.c | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
index 10e1fc9d0698..cd24d069b6eb 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
+++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
@@ -144,7 +144,7 @@ unsigned int intel_adjusted_rate(const struct drm_rect *src,
 				 const struct drm_rect *dst,
 				 unsigned int rate)
 {
-	unsigned int src_w, src_h, dst_w, dst_h;
+	unsigned int src_w, src_h, dst_w, dst_h, dst_wh;
 
 	src_w = drm_rect_width(src) >> 16;
 	src_h = drm_rect_height(src) >> 16;
@@ -155,8 +155,10 @@ unsigned int intel_adjusted_rate(const struct drm_rect *src,
 	dst_w = min(src_w, dst_w);
 	dst_h = min(src_h, dst_h);
 
-	return DIV_ROUND_UP_ULL(mul_u32_u32(rate, src_w * src_h),
-				dst_w * dst_h);
+	/* in case src contained only fractional part */
+	dst_wh = max(dst_w * dst_h, 1U);
+
+	return DIV_ROUND_UP_ULL(mul_u32_u32(rate, src_w * src_h), dst_wh);
 }
 
 unsigned int intel_plane_pixel_rate(const struct intel_crtc_state *crtc_state,
-- 
2.39.0