[Intel-gfx] [PATCH v6 6/9] drm/i915/vdsc: Check slice design requirement

[Kandpal, Suraj]

> 
> On Wed, 11 Jan 2023, Suraj Kandpal <suraj.kandpal at intel.com> wrote:
> > Add function to check if slice design requirements are being met as
> > defined in the below link section Slice Design Requirement
> >
> > https://gfxspecs.intel.com/Predator/Home/Index/49259
> >
> 
> Just add this:
> 
> Bspec: 49259
> 
> and no URLs.
> 

Ohkay got it

> > Signed-off-by: Suraj Kandpal <suraj.kandpal at intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_vdsc.c | 32
> > +++++++++++++++++++++++
> >  1 file changed, 32 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c
> > b/drivers/gpu/drm/i915/display/intel_vdsc.c
> > index 52a82d8b289e..0a683d6dff33 100644
> > --- a/drivers/gpu/drm/i915/display/intel_vdsc.c
> > +++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
> > @@ -447,6 +447,29 @@ calculate_rc_params(struct rc_parameters *rc,
> >  	}
> >  }
> >
> > +static int intel_dsc_check_slice_design_req(struct intel_crtc_state *pipe_config,
> > +					    struct drm_dsc_config *vdsc_cfg)
> 
> Bikeshedding, I think "check" is generally a poor verb in a function name.
> 
> intel_dsc_slice_dimensions_valid() or something like that?

Sure then ill go with intel_dsc_validate_slice_design

Regards,
Suraj Kandpal
> 
> 
> > +{
> > +	if (pipe_config->output_format == INTEL_OUTPUT_FORMAT_RGB ||
> > +	    pipe_config->output_format == INTEL_OUTPUT_FORMAT_YCBCR444) {
> > +		if (vdsc_cfg->slice_height > 4095)
> > +			return -EINVAL;
> > +		if (vdsc_cfg->slice_height * vdsc_cfg->slice_width < 15000)
> > +			return -EINVAL;
> > +	} else if (pipe_config->output_format ==
> INTEL_OUTPUT_FORMAT_YCBCR420) {
> > +		if (!(vdsc_cfg->slice_width % 2))
> > +			return -EINVAL;
> > +		if (!(vdsc_cfg->slice_height % 2))
> > +			return -EINVAL;
> > +		if (vdsc_cfg->slice_height > 4094)
> > +			return -EINVAL;
> > +		if (vdsc_cfg->slice_height * vdsc_cfg->slice_width < 30000)
> > +			return -EINVAL;
> > +	}
> > +
> > +	return 0;
> > +}
> > +
> >  int intel_dsc_compute_params(struct intel_crtc_state *pipe_config)  {
> >  	struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
> > @@ -455,11 +478,20 @@ int intel_dsc_compute_params(struct intel_crtc_state
> *pipe_config)
> >  	u16 compressed_bpp = pipe_config->dsc.compressed_bpp;
> >  	const struct rc_parameters *rc_params;
> >  	struct rc_parameters *rc = NULL;
> > +	int err;
> >  	u8 i = 0;
> >
> >  	vdsc_cfg->pic_width = pipe_config->hw.adjusted_mode.crtc_hdisplay;
> >  	vdsc_cfg->slice_width = DIV_ROUND_UP(vdsc_cfg->pic_width,
> >  					     pipe_config->dsc.slice_count);
> > +
> > +	err = intel_dsc_check_slice_design_req(pipe_config, vdsc_cfg);
> > +
> > +	if (err) {
> > +		drm_dbg_kms(&dev_priv->drm, "Slice design requirements not
> met\n");
> > +		return err;
> > +	}
> > +
> >  	/*
> >  	 * According to DSC 1.2 specs if colorspace is YCbCr then convert_rgb is 0
> >  	 * else 1
> 
> --
> Jani Nikula, Intel Open Source Graphics Center