[Intel-gfx] [PATCH v3] drm/i915/psr: Split sel fetch plane configuration into arm and noarm

Hogander, Jouni jouni.hogander at intel.com
Mon Jan 30 14:52:00 UTC 2023


On Mon, 2023-01-30 at 13:22 +0000, Coelho, Luciano wrote:
> On Mon, 2023-01-30 at 10:06 +0200, Jouni Högander wrote:
> > SEL_FETCH_CTL registers are armed immediately when plane is
> > disabled.
> > SEL_FETCH_* instances of plane configuration are used when doing
> > selective update and normal plane register instances for full
> > updates.
> > Currently all SEL_FETCH_* registers are written as a part of noarm
> > plane configuration. If noarm and arm plane configuration are not
> > happening within same vblank we may end up having plane as a part
> > of
> > selective update before it's PLANE_SURF register is written.
> > 
> > Fix this by splitting plane selective fetch configuration into arm
> > and
> > noarm versions and call them accordingly. Write SEL_FETCH_CTL in
> > arm
> > version.
> > 
> > v3:
> >  - add arm suffix into intel_psr2_disable_plane_sel_fetch
> > v2:
> >  - drop color_plane parameter from arm part
> >  - dev_priv -> i915 in arm part
> > 
> > Cc: Ville Syrjälä <ville.syrjala at linux.intel.com>
> > Cc: José Roberto de Souza <jose.souza at intel.com>
> > Cc: Mika Kahola <mika.kahola at intel.com>
> > Cc: Vinod Govindapillai <vinod.govindapillai at intel.com>
> > Cc: Stanislav Lisovskiy <stanislav.lisovskiy at intel.com>
> > Cc: Luca Coelho <luciano.coelho at intel.com>
> > Signed-off-by: Jouni Högander <jouni.hogander at intel.com>
> > Reviewed-by: José Roberto de Souza <jose.souza at intel.com>
> > ---
> 
> Reviewed-by: Luca Coelho <luciano.coelho at intel.com>

Thank you, this is now merged.

> 
> --
> Cheers,
> Luca.



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