[Intel-gfx] [PATCH v2 2/4] drm/i915/gt: Ensure memory quiesced before invalidation

[Nirmoy Das]

Hi Andi and Jonathan,

On 6/27/2023 11:43 AM, Andi Shyti wrote:
> From: Jonathan Cavitt <jonathan.cavitt at intel.com>
>
> All memory traffic must be quiesced before requesting
> an aux invalidation on platforms that use Aux CCS.
>
> Fixes: 972282c4cf24 ("drm/i915/gen12: Add aux table invalidate for all engines")
> Signed-off-by: Jonathan Cavitt <jonathan.cavitt at intel.com>
> Signed-off-by: Andi Shyti <andi.shyti at linux.intel.com>
> Cc: <stable at vger.kernel.org> # v5.8+
> ---
>   drivers/gpu/drm/i915/gt/gen8_engine_cs.c | 7 +++++++
>   1 file changed, 7 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/gt/gen8_engine_cs.c b/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
> index 563efee055602..e10e1ad0e841f 100644
> --- a/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
> +++ b/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
> @@ -202,6 +202,13 @@ int gen12_emit_flush_rcs(struct i915_request *rq, u32 mode)
>   {
>   	struct intel_engine_cs *engine = rq->engine;
>   
> +	/*
> +	 * Aux invalidations on Aux CCS platforms require
> +	 * memory traffic is quiesced prior.

I see that we are doing aux inval on EMIT_INVALIDATE so it make sense to

  do if ((mode & EMIT_INVALIDATE) && !HAS_FLAT_CCS(engine->i915) )

> +	 */
> +	if (!HAS_FLAT_CCS(engine->i915))
> +		mode |= EMIT_FLUSH;

I think this generic EMIT_FLUSH is not enough. I seeing some missing 
flags for PIPE_CONTROL

As per https://gfxspecs.intel.com/Predator/Home/Index/43904. It makes 
sense to move this to a

new function given the complexity of PIPE_CONTROL flags requires for this.


Regards,

Nirmoy


> +
>   	if (mode & EMIT_FLUSH) {
>   		u32 flags = 0;
>   		int err;