[Intel-gfx] [PATCH v3 2/5] drm/i915/gt: Ensure memory quiesced before invalidation
Nirmoy Das
nirmoy.das at linux.intel.com
Mon Jul 17 14:12:55 UTC 2023
On 7/17/2023 2:51 PM, Andi Shyti wrote:
> From: Jonathan Cavitt<jonathan.cavitt at intel.com>
>
> All memory traffic must be quiesced before requesting
> an aux invalidation on platforms that use Aux CCS.
>
> Fixes: 972282c4cf24 ("drm/i915/gen12: Add aux table invalidate for all engines")
> Signed-off-by: Jonathan Cavitt<jonathan.cavitt at intel.com>
> Signed-off-by: Andi Shyti<andi.shyti at linux.intel.com>
> Cc:<stable at vger.kernel.org> # v5.8+
|Reviewed-by: Nirmoy Das <nirmoy.das at intel.com>|
> ---
> drivers/gpu/drm/i915/gt/gen8_engine_cs.c | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/gt/gen8_engine_cs.c b/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
> index 563efee055602..bee3b7dc595cf 100644
> --- a/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
> +++ b/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
> @@ -202,6 +202,13 @@ int gen12_emit_flush_rcs(struct i915_request *rq, u32 mode)
> {
> struct intel_engine_cs *engine = rq->engine;
>
> + /*
> + * Aux invalidations on Aux CCS platforms require
> + * memory traffic is quiesced prior.
> + */
> + if ((mode & EMIT_INVALIDATE) && !HAS_FLAT_CCS(engine->i915))
> + mode |= EMIT_FLUSH;
> +
> if (mode & EMIT_FLUSH) {
> u32 flags = 0;
> int err;
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