[Intel-gfx] [PATCH 6/8] drm/i915/mtl: Eliminate subplatforms

Gustavo Sousa gustavo.sousa at intel.com
Wed Jul 19 19:27:59 UTC 2023


Quoting Matt Roper (2023-07-18 19:28:00-03:00)
>Now that we properly match the Xe_LPG IP versions associated with
>various workarounds, there's no longer any need to define separate MTL
>subplatform in the driver.  Nothing in the code is conditional on MTL-M
>or MTL-P base platforms.  Furthermore, I'm not sure the "M" and "P"
>designations are even an accurate representation of which specific
>platforms would have which IP versions; those were mostly just
>placeholders from a long time ago.  The reality is that the IP version
>present on a platform gets read from a fuse register at driver init; we
>shouldn't be trying to guess which IP is present based on PCI ID
>anymore.
>
>Signed-off-by: Matt Roper <matthew.d.roper at intel.com>

Reviewed-by: Gustavo Sousa <gustavo.sousa at intel.com>

>---
> drivers/gpu/drm/i915/i915_drv.h          |  4 ----
> drivers/gpu/drm/i915/intel_device_info.c | 14 --------------
> drivers/gpu/drm/i915/intel_device_info.h |  4 ----
> include/drm/i915_pciids.h                | 11 +++--------
> 4 files changed, 3 insertions(+), 30 deletions(-)
>
>diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
>index cf72c34bca10..67cd9914bf33 100644
>--- a/drivers/gpu/drm/i915/i915_drv.h
>+++ b/drivers/gpu/drm/i915/i915_drv.h
>@@ -581,10 +581,6 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
> #define IS_PONTEVECCHIO(i915) IS_PLATFORM(i915, INTEL_PONTEVECCHIO)
> #define IS_METEORLAKE(i915) IS_PLATFORM(i915, INTEL_METEORLAKE)
> 
>-#define IS_METEORLAKE_M(i915) \
>-        IS_SUBPLATFORM(i915, INTEL_METEORLAKE, INTEL_SUBPLATFORM_M)
>-#define IS_METEORLAKE_P(i915) \
>-        IS_SUBPLATFORM(i915, INTEL_METEORLAKE, INTEL_SUBPLATFORM_P)
> #define IS_DG2_G10(i915) \
>         IS_SUBPLATFORM(i915, INTEL_DG2, INTEL_SUBPLATFORM_G10)
> #define IS_DG2_G11(i915) \
>diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
>index ea0ec6174ce5..9dfa680a4c62 100644
>--- a/drivers/gpu/drm/i915/intel_device_info.c
>+++ b/drivers/gpu/drm/i915/intel_device_info.c
>@@ -206,14 +206,6 @@ static const u16 subplatform_g12_ids[] = {
>         INTEL_DG2_G12_IDS(0),
> };
> 
>-static const u16 subplatform_m_ids[] = {
>-        INTEL_MTL_M_IDS(0),
>-};
>-
>-static const u16 subplatform_p_ids[] = {
>-        INTEL_MTL_P_IDS(0),
>-};
>-
> static bool find_devid(u16 id, const u16 *p, unsigned int num)
> {
>         for (; num; num--, p++) {
>@@ -275,12 +267,6 @@ static void intel_device_info_subplatform_init(struct drm_i915_private *i915)
>         } else if (find_devid(devid, subplatform_g12_ids,
>                               ARRAY_SIZE(subplatform_g12_ids))) {
>                 mask = BIT(INTEL_SUBPLATFORM_G12);
>-        } else if (find_devid(devid, subplatform_m_ids,
>-                              ARRAY_SIZE(subplatform_m_ids))) {
>-                mask = BIT(INTEL_SUBPLATFORM_M);
>-        } else if (find_devid(devid, subplatform_p_ids,
>-                              ARRAY_SIZE(subplatform_p_ids))) {
>-                mask = BIT(INTEL_SUBPLATFORM_P);
>         }
> 
>         GEM_BUG_ON(mask & ~INTEL_SUBPLATFORM_MASK);
>diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
>index dbfe6443457b..2ca54417d19b 100644
>--- a/drivers/gpu/drm/i915/intel_device_info.h
>+++ b/drivers/gpu/drm/i915/intel_device_info.h
>@@ -129,10 +129,6 @@ enum intel_platform {
> #define INTEL_SUBPLATFORM_N    1
> #define INTEL_SUBPLATFORM_RPLU  2
> 
>-/* MTL */
>-#define INTEL_SUBPLATFORM_M        0
>-#define INTEL_SUBPLATFORM_P        1
>-
> enum intel_ppgtt_type {
>         INTEL_PPGTT_NONE = I915_GEM_PPGTT_NONE,
>         INTEL_PPGTT_ALIASING = I915_GEM_PPGTT_ALIASING,
>diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h
>index e1e10dfbb661..38dae757d1a8 100644
>--- a/include/drm/i915_pciids.h
>+++ b/include/drm/i915_pciids.h
>@@ -738,18 +738,13 @@
> #define INTEL_ATS_M_IDS(info) \
>         INTEL_ATS_M150_IDS(info), \
>         INTEL_ATS_M75_IDS(info)
>+
> /* MTL */
>-#define INTEL_MTL_M_IDS(info) \
>+#define INTEL_MTL_IDS(info) \
>         INTEL_VGA_DEVICE(0x7D40, info), \
>-        INTEL_VGA_DEVICE(0x7D60, info)
>-
>-#define INTEL_MTL_P_IDS(info) \
>         INTEL_VGA_DEVICE(0x7D45, info), \
>         INTEL_VGA_DEVICE(0x7D55, info), \
>+        INTEL_VGA_DEVICE(0x7D60, info), \
>         INTEL_VGA_DEVICE(0x7DD5, info)
> 
>-#define INTEL_MTL_IDS(info) \
>-        INTEL_MTL_M_IDS(info), \
>-        INTEL_MTL_P_IDS(info)
>-
> #endif /* _I915_PCIIDS_H */
>-- 
>2.41.0
>


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