[Intel-gfx] [PATCH v8 7/9] drm/i915/gt: Ensure memory quiesced before invalidation for all engines
Andi Shyti
andi.shyti at linux.intel.com
Mon Jul 24 09:14:27 UTC 2023
Hi Andrzej,
> > intel_engine_mask_t aux_inv = 0;
> > - u32 cmd, *cs;
> > + u32 cmd_flush = 0;
> > + u32 cmd = 4;
> > + u32 *cs;
> > - cmd = 4;
> > - if (mode & EMIT_INVALIDATE) {
> > + if (mode & EMIT_INVALIDATE)
> > cmd += 2;
> > - if (gen12_needs_ccs_aux_inv(rq->engine) &&
> > - (rq->engine->class == VIDEO_DECODE_CLASS ||
> > - rq->engine->class == VIDEO_ENHANCEMENT_CLASS)) {
> > - aux_inv = rq->engine->mask &
> > - ~GENMASK(_BCS(I915_MAX_BCS - 1), BCS0);
> > - if (aux_inv)
> > - cmd += 4;
> > - }
> > + if (gen12_needs_ccs_aux_inv(rq->engine))
> > + aux_inv = rq->engine->mask &
> > + ~GENMASK(_BCS(I915_MAX_BCS - 1), BCS0);
>
> Shouldn't we remove BCS check for MTL? And move it inside
> gen12_needs_ccs_aux_inv?
> Btw aux_inv is used as bool, make better is to make it bool.
Both the cleanups come in patch 9. I wanted to move it initially
before, but per engine check come later in the series.
I think would need to re-architecture all the patch structure if
I want to remove it :)
Are you strong with this change?
Andi
More information about the Intel-gfx
mailing list