[Intel-gfx] [PATCH V5] drm/i915/gt: Add workaround 14016712196
Andi Shyti
andi.shyti at linux.intel.com
Mon Jun 5 09:43:36 UTC 2023
Hi Tejas,
On Thu, Jun 01, 2023 at 04:39:59PM +0530, Tejas Upadhyay wrote:
> For mtl, workaround suggests that, SW insert a
> dummy PIPE_CONTROL prior to PIPE_CONTROL which
> contains a post sync: Timestamp or Write Immediate.
>
> Bspec: 72197
>
> V5:
> - Remove ret variable - Andi
> V4:
> - Update commit message, avoid returing cs - Andi/Matt
> V3:
> - Wrap dummy pipe control stuff in API - Andi
> V2:
> - Fix kernel test robot warnings
>
> Closes: https://lore.kernel.org/oe-kbuild-all/202305121525.3EWdGoBY-lkp@intel.com/
> Reviewed-by: Andi Shyti <andi.shyti at linux.intel.com>
> Signed-off-by: Tejas Upadhyay <tejas.upadhyay at intel.com>
pushed to drm-intel-gt-next.
Thanks,
Andi
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