[Intel-gfx] [PATCH v2 05/19] drm/i915/dsb: Define the contents of some intstructions bit better

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala at linux.intel.com>

Add some defines to specify what goes inside certain DSB
instructions.

Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_dsb.c | 12 ++++++++----
 1 file changed, 8 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dsb.c b/drivers/gpu/drm/i915/display/intel_dsb.c
index 42911abcd3ab..093b2567883d 100644
--- a/drivers/gpu/drm/i915/display/intel_dsb.c
+++ b/drivers/gpu/drm/i915/display/intel_dsb.c
@@ -70,17 +70,21 @@ struct intel_dsb {
 #define DSB_OPCODE_SHIFT		24
 #define DSB_OPCODE_NOOP			0x0
 #define DSB_OPCODE_MMIO_WRITE		0x1
+#define   DSB_BYTE_EN			0xf
+#define   DSB_BYTE_EN_SHIFT		20
+#define   DSB_REG_VALUE_MASK		0xfffff
 #define DSB_OPCODE_WAIT_USEC		0x2
-#define DSB_OPCODE_WAIT_LINES		0x3
+#define DSB_OPCODE_WAIT_SCANLINE	0x3
 #define DSB_OPCODE_WAIT_VBLANKS		0x4
 #define DSB_OPCODE_WAIT_DSL_IN		0x5
 #define DSB_OPCODE_WAIT_DSL_OUT		0x6
+#define   DSB_SCANLINE_UPPER_SHIFT	20
+#define   DSB_SCANLINE_LOWER_SHIFT	0
 #define DSB_OPCODE_INTERRUPT		0x7
 #define DSB_OPCODE_INDEXED_WRITE	0x9
+/* see DSB_REG_VALUE_MASK */
 #define DSB_OPCODE_POLL			0xA
-#define DSB_BYTE_EN			0xF
-#define DSB_BYTE_EN_SHIFT		20
-#define DSB_REG_VALUE_MASK		0xfffff
+/* see DSB_REG_VALUE_MASK */
 
 static bool assert_dsb_has_room(struct intel_dsb *dsb)
 {
-- 
2.39.3