[Intel-gfx] [PATCH v17 1/1] drm/i915: Allow user to set cache at BO creation

[Yang, Fei]

> Hi Carl,
>
>>>> besides this, ask a dumb question.
>>>> How we retrieve the pat_index from a shared resource though dma_buf fd?
>>>> maybe we need to know whether it could be CPU cached if we want map it.
>>>> Of course, looks there are no real usage to access it though CPU.
>>>> Just use it directly without any pat related options ?
>>>
>>> I am not understanding. Do you want to ask the PAT table to the driver? Are
>>> you referring to the CPU PAT index?
>>>
>>> In any case, if I understood correctly, you don't necessarily always need to
>>> set the PAT options and the cache options will fall into the default values.
>>>
>>> Please let me know if I haven't answered the question.
>>>
>>
>> If mesa create a resource , then use DRM_IOCTL_PRIME_HANDLE_TO_FD convert it to a dma fd.
>> Then share it to media, media use DRM_IOCTL_PRIME_FD_TO_HANDLE convert it to a gem bo.
>> But media does not know the PAT index , because mesa create it and set it.
>> So, if media want to call DRM_IOCTL_I915_GEM_MMAP_OFFSET, media does not know whether it could be WB.
>
> That's a good point. To be honest I am not really sure how this
> is handled.
>
> Fei, Jordan? Do you have suggestion here?

Is it possible to pass the PAT setting when sharing the fd?
Or perhaps we should have kept the get_caching ioctl functional?
Joonas, could you chime in here?

> Andi
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