[Intel-gfx] [PATCH v2 00/13] drm/i915/psr: Restore HSW/BDW PSR1

[Hogander, Jouni]

On Fri, 2023-06-09 at 17:13 +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala at linux.intel.com>
> 
> Fix all the obvious issues affecting HSW/BDW PSR1 and
> restore it back to life.
> 
> The PC8+ vs. init_clock_gating() problem also affects
> some non-PSR workarounds as well.
> 
> v2: Rebase (due to irq code movement mostly)
>     Deal with review comments wrt. the AUX setup

For the whole set:

Reviewed-by: Jouni Högander <jouni.hogander at intel.com>

> 
> Ville Syrjälä (13):
>   drm/i915: Re-init clock gating on coming out of PC8+
>   drm/i915/psr: Fix BDW PSR AUX CH data register offsets
>   drm/i915/psr: Wrap PSR1 register with functions
>   drm/i915/psr: Reintroduce HSW PSR1 registers
>   drm/i915/psr: Bring back HSW/BDW PSR AUX CH registers/setup
>   drm/i915/psr: HSW/BDW have no PSR2
>   drm/i915/psr: Restore PSR interrupt handler for HSW
>   drm/i915/psr: Implement WaPsrDPAMaskVBlankInSRD:hsw
>   drm/i915/psr: Implement WaPsrDPRSUnmaskVBlankInSRD:hsw
>   drm/i915/psr: Do no mask display register writes on hsw/bdw
>   drm/i915/psr: Don't skip both TP1 and TP2/3 on hsw/bdw
>   drm/i915/psr: Allow PSR with sprite enabled on hsw/bdw
>   drm/i915/psr: Re-enable PSR1 on hsw/bdw
> 
>  drivers/gpu/drm/i915/display/intel_display.c  |   4 +
>  .../drm/i915/display/intel_display_device.c   |   4 +
>  .../gpu/drm/i915/display/intel_display_irq.c  |  14 ++
>  .../drm/i915/display/intel_display_power.c    |   6 +-
>  drivers/gpu/drm/i915/display/intel_dp_aux.c   |   2 +-
>  drivers/gpu/drm/i915/display/intel_dp_aux.h   |   3 +
>  drivers/gpu/drm/i915/display/intel_psr.c      | 196 ++++++++++++++--
> --
>  drivers/gpu/drm/i915/display/intel_psr_regs.h |  18 +-
>  drivers/gpu/drm/i915/intel_clock_gating.c     |  11 +
>  9 files changed, 217 insertions(+), 41 deletions(-)
>