[Intel-gfx] [PATCH 05/11] drm/i915/KBL: s/KBL/KABYLAKE for platform/subplatform defines

Srivatsa, Anusha anusha.srivatsa at intel.com
Thu Jun 15 21:40:14 UTC 2023 

OK one thing that holds true for all patches in the series is the subject: drm/i915/PLATFORM:
The general convention is to have platform is lower cases I the subject prefix. So all occurrences of drm/i915/PLATFORM should be replaced with drm/i915/platform.
This is something I have missed mentioning in the previous patches that gave a r-b to.


Apart from the above mentioned platform prefix feedback,
Reviewed-by: Anusha Srivatsa <anusha.srivatsa at intel.com>

> -----Original Message-----
> From: Bhadane, Dnyaneshwar <dnyaneshwar.bhadane at intel.com>
> Sent: Wednesday, June 14, 2023 10:00 PM
> To: intel-gfx at lists.freedesktop.org
> Cc: Atwood, Matthew S <matthew.s.atwood at intel.com>; Srivatsa, Anusha
> <anusha.srivatsa at intel.com>; Bhadane, Dnyaneshwar
> <dnyaneshwar.bhadane at intel.com>
> Subject: [PATCH 05/11] drm/i915/KBL: s/KBL/KABYLAKE for
> platform/subplatform defines
> 
> Follow consistent naming convention. Replace KBL with KABYLAKE.
> 
> Signed-off-by: Dnyaneshwar Bhadane <dnyaneshwar.bhadane at intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c |  4 ++--
>  drivers/gpu/drm/i915/gt/gen8_engine_cs.c           |  2 +-
>  drivers/gpu/drm/i915/gt/intel_workarounds.c        |  6 +++---
>  drivers/gpu/drm/i915/i915_drv.h                    | 12 ++++++------
>  drivers/gpu/drm/i915/intel_clock_gating.c          |  4 ++--
>  5 files changed, 14 insertions(+), 14 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
> b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
> index 9e34cc103aeb..84b09d188d2a 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
> @@ -1718,9 +1718,9 @@ void intel_ddi_buf_trans_init(struct intel_encoder
> *encoder)
>  			encoder->get_buf_trans = icl_get_mg_buf_trans;
>  	} else if (IS_GEMINILAKE(i915) || IS_BROXTON(i915)) {
>  		encoder->get_buf_trans = bxt_get_buf_trans;
> -	} else if (IS_CML_ULX(i915) || IS_CFL_ULX(i915) || IS_KBL_ULX(i915)) {
> +	} else if (IS_CML_ULX(i915) || IS_CFL_ULX(i915) ||
> +IS_KABYLAKE_ULX(i915)) {
>  		encoder->get_buf_trans = kbl_y_get_buf_trans;
> -	} else if (IS_CML_ULT(i915) || IS_CFL_ULT(i915) || IS_KBL_ULT(i915)) {
> +	} else if (IS_CML_ULT(i915) || IS_CFL_ULT(i915) ||
> +IS_KABYLAKE_ULT(i915)) {
>  		encoder->get_buf_trans = kbl_u_get_buf_trans;
>  	} else if (IS_COMETLAKE(i915) || IS_COFFEELAKE(i915) ||
> IS_KABYLAKE(i915)) {
>  		encoder->get_buf_trans = kbl_get_buf_trans; diff --git
> a/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
> b/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
> index eb72610a8588..ec0771dc662a 100644
> --- a/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
> +++ b/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
> @@ -43,7 +43,7 @@ int gen8_emit_flush_rcs(struct i915_request *rq, u32
> mode)
>  			vf_flush_wa = true;
> 
>  		/* WaForGAMHang:kbl */
> -		if (IS_KBL_GRAPHICS_STEP(rq->engine->i915, 0, STEP_C0))
> +		if (IS_KABYLAKE_GRAPHICS_STEP(rq->engine->i915, 0,
> STEP_C0))
>  			dc_flush_wa = true;
>  	}
> 
> diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c
> b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> index a62dcbc2f901..b632fb5592a8 100644
> --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
> +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> @@ -584,7 +584,7 @@ static void kbl_ctx_workarounds_init(struct
> intel_engine_cs *engine,
>  	gen9_ctx_workarounds_init(engine, wal);
> 
>  	/* WaToEnableHwFixForPushConstHWBug:kbl */
> -	if (IS_KBL_GRAPHICS_STEP(i915, STEP_C0, STEP_FOREVER))
> +	if (IS_KABYLAKE_GRAPHICS_STEP(i915, STEP_C0, STEP_FOREVER))
>  		wa_masked_en(wal, COMMON_SLICE_CHICKEN2,
>  			     GEN8_SBE_DISABLE_REPLAY_BUF_OPTIMIZATION);
> 
> @@ -1185,7 +1185,7 @@ kbl_gt_workarounds_init(struct intel_gt *gt, struct
> i915_wa_list *wal)
>  	gen9_gt_workarounds_init(gt, wal);
> 
>  	/* WaDisableDynamicCreditSharing:kbl */
> -	if (IS_KBL_GRAPHICS_STEP(gt->i915, 0, STEP_C0))
> +	if (IS_KABYLAKE_GRAPHICS_STEP(gt->i915, 0, STEP_C0))
>  		wa_write_or(wal,
>  			    GAMT_CHKN_BIT_REG,
> 
> GAMT_CHKN_DISABLE_DYNAMIC_CREDIT_SHARING);
> @@ -2933,7 +2933,7 @@ xcs_engine_wa_init(struct intel_engine_cs *engine,
> struct i915_wa_list *wal)
>  	struct drm_i915_private *i915 = engine->i915;
> 
>  	/* WaKBLVECSSemaphoreWaitPoll:kbl */
> -	if (IS_KBL_GRAPHICS_STEP(i915, STEP_A0, STEP_F0)) {
> +	if (IS_KABYLAKE_GRAPHICS_STEP(i915, STEP_A0, STEP_F0)) {
>  		wa_write(wal,
>  			 RING_SEMA_WAIT_POLL(engine->mmio_base),
>  			 1);
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 3981b890f053..f19915115cff 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -614,9 +614,9 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
>  	IS_SUBPLATFORM(i915, INTEL_SKYLAKE, INTEL_SUBPLATFORM_ULT)
> #define IS_SKL_ULX(i915) \
>  	IS_SUBPLATFORM(i915, INTEL_SKYLAKE, INTEL_SUBPLATFORM_ULX) -
> #define IS_KBL_ULT(i915) \
> +#define IS_KABYLAKE_ULT(i915) \
>  	IS_SUBPLATFORM(i915, INTEL_KABYLAKE, INTEL_SUBPLATFORM_ULT)
> -#define IS_KBL_ULX(i915) \
> +#define IS_KABYLAKE_ULX(i915) \
>  	IS_SUBPLATFORM(i915, INTEL_KABYLAKE, INTEL_SUBPLATFORM_ULX)
>  #define IS_SKL_GT2(i915)	(IS_SKYLAKE(i915) && \
>  				 INTEL_INFO(i915)->gt == 2)
> @@ -624,9 +624,9 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
>  				 INTEL_INFO(i915)->gt == 3)
>  #define IS_SKL_GT4(i915)	(IS_SKYLAKE(i915) && \
>  				 INTEL_INFO(i915)->gt == 4)
> -#define IS_KBL_GT2(i915)	(IS_KABYLAKE(i915) && \
> +#define IS_KABYLAKE_GT2(i915)	(IS_KABYLAKE(i915) && \
>  				 INTEL_INFO(i915)->gt == 2)
> -#define IS_KBL_GT3(i915)	(IS_KABYLAKE(i915) && \
> +#define IS_KABYLAKE_GT3(i915)	(IS_KABYLAKE(i915) && \
>  				 INTEL_INFO(i915)->gt == 3)
>  #define IS_CFL_ULT(i915) \
>  	IS_SUBPLATFORM(i915, INTEL_COFFEELAKE,
> INTEL_SUBPLATFORM_ULT) @@ -652,9 +652,9 @@ IS_SUBPLATFORM(const
> struct drm_i915_private *i915,
> 
>  #define IS_SKL_GRAPHICS_STEP(p, since, until) (IS_SKYLAKE(p) &&
> IS_GRAPHICS_STEP(p, since, until))
> 
> -#define IS_KBL_GRAPHICS_STEP(i915, since, until) \
> +#define IS_KABYLAKE_GRAPHICS_STEP(i915, since, until) \
>  	(IS_KABYLAKE(i915) && IS_GRAPHICS_STEP(i915, since, until)) -#define
> IS_KBL_DISPLAY_STEP(i915, since, until) \
> +#define IS_KABYLAKE_DISPLAY_STEP(i915, since, until) \
>  	(IS_KABYLAKE(i915) && IS_DISPLAY_STEP(i915, since, until))
> 
>  #define IS_JASPERLAKE_EHL_GRAPHICS_STEP(p, since, until) \ diff --git
> a/drivers/gpu/drm/i915/intel_clock_gating.c
> b/drivers/gpu/drm/i915/intel_clock_gating.c
> index a27600bc5976..bb349043522c 100644
> --- a/drivers/gpu/drm/i915/intel_clock_gating.c
> +++ b/drivers/gpu/drm/i915/intel_clock_gating.c
> @@ -456,12 +456,12 @@ static void kbl_init_clock_gating(struct
> drm_i915_private *i915)
>  	intel_uncore_rmw(&i915->uncore, FBC_LLC_READ_CTRL, 0,
> FBC_LLC_FULLY_OPEN);
> 
>  	/* WaDisableSDEUnitClockGating:kbl */
> -	if (IS_KBL_GRAPHICS_STEP(i915, 0, STEP_C0))
> +	if (IS_KABYLAKE_GRAPHICS_STEP(i915, 0, STEP_C0))
>  		intel_uncore_rmw(&i915->uncore, GEN8_UCGCTL6,
>  				 0, GEN8_SDEUNIT_CLOCK_GATE_DISABLE);
> 
>  	/* WaDisableGamClockGating:kbl */
> -	if (IS_KBL_GRAPHICS_STEP(i915, 0, STEP_C0))
> +	if (IS_KABYLAKE_GRAPHICS_STEP(i915, 0, STEP_C0))
>  		intel_uncore_rmw(&i915->uncore, GEN6_UCGCTL1,
>  				 0, GEN6_GAMUNIT_CLOCK_GATE_DISABLE);
> 
> --
> 2.34.1

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