[Intel-gfx] [PATCHv4] drm/i915/display/dp: On AUX xfer timeout restart freshly

[Murthy, Arun R]

> -----Original Message-----
> From: Nikula, Jani <jani.nikula at intel.com>
> Sent: Monday, June 19, 2023 5:37 PM
> To: Murthy, Arun R <arun.r.murthy at intel.com>; intel-
> gfx at lists.freedesktop.org
> Cc: Deak, Imre <imre.deak at intel.com>; Kahola, Mika
> <mika.kahola at intel.com>; Murthy, Arun R <arun.r.murthy at intel.com>
> Subject: Re: [PATCHv4] drm/i915/display/dp: On AUX xfer timeout restart
> freshly
> 
> On Mon, 19 Jun 2023, Arun R Murthy <arun.r.murthy at intel.com> wrote:
> > At the beginning of the aux transfer a check for aux control busy bit
> > is done. Then as per the spec on aux transfer timeout, need to retry
> > freshly for 3 times with a delay which is taken care by the control
> > register.
> > On each of these 3 trials a check for busy has to be done so as to
> > start freshly.
> >
> > v2: updated the commit message
> > v4: check for SEND_BUSY after write (Imre)
> >
> > Signed-off-by: Arun R Murthy <arun.r.murthy at intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_dp_aux.c | 58
> > +++++++++------------
> >  1 file changed, 26 insertions(+), 32 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux.c
> > b/drivers/gpu/drm/i915/display/intel_dp_aux.c
> > index 21b50a5c8a85..abe8047fac39 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp_aux.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dp_aux.c
> > @@ -226,6 +226,7 @@ intel_dp_aux_xfer(struct intel_dp *intel_dp,
> >  	int i, ret, recv_bytes;
> >  	int try, clock = 0;
> >  	u32 status;
> > +	u32 send_ctl;
> >  	bool vdd;
> >
> >  	ch_ctl = intel_dp->aux_ch_ctl_reg(intel_dp);
> > @@ -273,45 +274,36 @@ intel_dp_aux_xfer(struct intel_dp *intel_dp,
> >  	 * it using the same AUX CH simultaneously
> >  	 */
> >
> > -	/* Try to wait for any previous AUX channel activity */
> > -	for (try = 0; try < 3; try++) {
> > -		status = intel_de_read_notrace(i915, ch_ctl);
> > -		if ((status & DP_AUX_CH_CTL_SEND_BUSY) == 0)
> > -			break;
> > -		msleep(1);
> > -	}
> > -	/* just trace the final value */
> > -	trace_i915_reg_rw(false, ch_ctl, status, sizeof(status), true);
> > -
> > -	if (try == 3) {
> > -		const u32 status = intel_de_read(i915, ch_ctl);
> > -
> > -		if (status != intel_dp->aux_busy_last_status) {
> > -			drm_WARN(&i915->drm, 1,
> > -				 "%s: not started (status 0x%08x)\n",
> > -				 intel_dp->aux.name, status);
> > -			intel_dp->aux_busy_last_status = status;
> > -		}
> > -
> > -		ret = -EBUSY;
> > -		goto out;
> > -	}
> > -
> >  	/* Only 5 data registers! */
> >  	if (drm_WARN_ON(&i915->drm, send_bytes > 20 || recv_size > 20)) {
> >  		ret = -E2BIG;
> >  		goto out;
> >  	}
> > +	send_ctl = intel_dp->get_aux_send_ctl(intel_dp,
> > +					      send_bytes,
> > +					      aux_clock_divider);
> > +	send_ctl |= aux_send_ctl_flags;
> >
> >  	while ((aux_clock_divider = intel_dp-
> >get_aux_clock_divider(intel_dp, clock++))) {
> > -		u32 send_ctl = intel_dp->get_aux_send_ctl(intel_dp,
> > -							  send_bytes,
> > -							  aux_clock_divider);
> > -
> > -		send_ctl |= aux_send_ctl_flags;
> 
> You can't move the send_ctl assignment outside the loop, because the loop
> changes aux_clock_divider which affects send_ctl.
> 
> Please take your time with the next version, and don't try to rush it, and we'll
> get this done quicker.

Sure.

> 
> > -
> > -		/* Must try at least 3 times according to DP spec */
> > +		/* Re-visit : Must try at least 3 times according to DP spec */
> 
> How is this change helpful?

There was a comment on the earlier patch for the retry count. Here we are retrying for 5 times but the spec says retry for 3 times. Need to revisit this to see if there is any WA/recommendation in Bspec and to update the same with link or revert it to 3 times.

> 
> >  		for (try = 0; try < 5; try++) {
> > +			/* Try to wait for any previous AUX channel activity
> */
> > +			status = intel_dp_aux_wait_done(intel_dp);
> > +			/* just trace the final value */
> > +			trace_i915_reg_rw(false, ch_ctl, status, sizeof(status),
> true);
> > +
> > +			if (status & DP_AUX_CH_CTL_SEND_BUSY) {
> > +				drm_WARN(&i915->drm, 1,
> > +					 "%s: not started, previous Tx still in
> process (status 0x%08x)\n",
> > +					 intel_dp->aux.name, status);
> > +				intel_dp->aux_busy_last_status = status;
> > +				if (try > 3) {
> > +					ret = -EBUSY;
> > +					goto out;
> > +				} else
> > +					continue;
> 
> If one branch needs braces, all of them do.
> 
Ok.

Thanks and Regards,
Arun R Murthy
--------------------
> > +			}
> > +
> >  			/* Load the send data into the aux channel data
> registers */
> >  			for (i = 0; i < send_bytes; i += 4)
> >  				intel_de_write(i915, ch_data[i >> 2], @@ -
> 321,6 +313,7 @@
> > intel_dp_aux_xfer(struct intel_dp *intel_dp,
> >  			/* Send the command and wait for it to complete */
> >  			intel_de_write(i915, ch_ctl, send_ctl);
> >
> > +			/* TODO: if typeC then 4.2ms else 800us. For DG2
> add 1.5ms for
> > +both cases */
> >  			status = intel_dp_aux_wait_done(intel_dp);
> >
> >  			/* Clear done status and any errors */ @@ -335,7
> +328,8 @@
> > intel_dp_aux_xfer(struct intel_dp *intel_dp,
> >  			 *   Timeout errors from the HW already meet this
> >  			 *   requirement so skip to next iteration
> >  			 */
> > -			if (status & DP_AUX_CH_CTL_TIME_OUT_ERROR)
> > +			if (status & (DP_AUX_CH_CTL_TIME_OUT_ERROR |
> > +
> 	DP_AUX_CH_CTL_SEND_BUSY))
> 
> The indentation is off.
> 
> >  				continue;
> >
> >  			if (status & DP_AUX_CH_CTL_RECEIVE_ERROR) {
> 
> --
> Jani Nikula, Intel Open Source Graphics Center