[Intel-gfx] [PATCH] drm/i915/display/dp: Add fallback on LT failure for DP2.0
Kandpal, Suraj
suraj.kandpal at intel.com
Tue Jun 20 11:05:27 UTC 2023
> For DP2.0 as per the Spec on LT failure we need to reduce the lane count if
> the lane count is not equal to 1. If lane count is 1 then need to retry with
> reducing the link rate.
Maybe adding the section where one can refer this in DP 2.0 spec can help.
>
> Signed-off-by: Arun R Murthy <arun.r.murthy at intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_dp.c | 20 ++++++++++++++++++--
> 1 file changed, 18 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index 54ddc953e5bc..2b12ca45596d 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -657,8 +657,20 @@ int intel_dp_get_link_train_fallback_values(struct
> intel_dp *intel_dp,
> "Retrying Link training for eDP with same
> parameters\n");
> return 0;
> }
> - intel_dp->max_link_rate = intel_dp_common_rate(intel_dp,
> index - 1);
> - intel_dp->max_link_lane_count = lane_count;
NIT: Can we add a small comment here on what is being done.
> + if (intel_dp->dpcd[DP_MAIN_LINK_CHANNEL_CODING] &
> DP_CAP_ANSI_128B132B) {
> + if (lane_count > 1) {
> + /* Reduce the lane count */
> + intel_dp->max_link_lane_count = lane_count
> >> 1;
> + intel_dp->max_link_rate =
> intel_dp_common_rate(intel_dp, index);
> + } else {
> + /* Reduce the link rate */
> + intel_dp->max_link_rate =
> intel_dp_common_rate(intel_dp, index - 1);
> + intel_dp->max_link_lane_count =
> intel_dp_max_common_lane_count(intel_dp);
> + }
> + } else {
> + intel_dp->max_link_rate =
> intel_dp_common_rate(intel_dp, index - 1);
> + intel_dp->max_link_lane_count = lane_count;
> + }
Also I see a little issue here so previously what used to happen was we reduced the
Link rate first and once we were at the lowest only then proceed to reduce the lane count
so has this been reversed in DP2.0 spec.
Regards,
Suraj Kandpal
> } else if (lane_count > 1) {
> if (intel_dp_is_edp(intel_dp) &&
> !intel_dp_can_link_train_fallback_for_edp(intel_dp,
> @@ -675,6 +687,10 @@ int intel_dp_get_link_train_fallback_values(struct
> intel_dp *intel_dp,
> return -1;
> }
>
> + drm_dbg_kms(&i915->drm,
> + "Retrying Link training with link rate %d and lane count
> %d\n",
> + intel_dp->max_link_rate, intel_dp->max_link_lane_count);
> +
> return 0;
> }
>
> --
> 2.25.1
More information about the Intel-gfx
mailing list