[Intel-gfx] [PATCH 3/3] drm/i915: Fix idle pattern enabling

[Imre Deak]

On Wed, Mar 08, 2023 at 11:28:07PM +0200, Ville Syrjälä wrote:
> On Thu, Mar 02, 2023 at 09:03:42PM +0200, Imre Deak wrote:
> > On Tue, Feb 14, 2023 at 03:43:48PM +0200, Ville Syrjala wrote:
> > > From: Ville Syrjälä <ville.syrjala at linux.intel.com>
> > > 
> > > Currently we are always switching to the idle pattern after the
> > > link training, but we don't always wait for the minimum number
> > > of idle patterns sent. That doesn't look to be what Bspec
> > > asks of us.
> > > 
> > > According to bspec what we should do is switch to idle pattern
> > > and wait for it only in DP1.4 MST cases. In all other cases we
> > > should apparently do neither.
> > > 
> > > What confuses matters further is that the port sync SST sequence
> > > asks us to "stay in idle pattern". But if we never switched to it
> > > how can we stay in it? This still needs further clarificaiton.
> > 
> > HSW seems to require it also for SST, but yes for all other platforms
> > bspec only requires it for MST.
> 
> commit 3ab9c63705cb ("drm/i915: hsw: fix link training for eDP on
> port-A") (written by you it seems :) says there was some problem on
> HSW that needed it for DDI A SST as well. But it's not really obvious
> why you skipped the IDLE_DONE thing there. Maybe just an optimization?

Ok, forgot about that. Looking back at the discussion the problem on HSW
was that switching from sending idle patterns to normal mode didn't
happen automatically due to some HW problem. The workaround was to to
switch to idle patterns and enable normal mode manually after the pipe
is enabled. The WA didn't require waiting for IDLE_DONE, but before
TGL there is no DP_TP_STATUS register on port A either.

> Anyways, that does suggest that perhaps the current code is more
> correct than what I'm proposing here.
> 
> > The DP2.1 standard has some addition
> > (3.5.1.2.6) referring to idle pattern to be sent after TPS even for SST.
> > Not sure if this would be done automatically by HW w/o manually
> > switching to it.
> 
> I did at some point spot some DP state machine status bits in some
> debug register. If I get bored I might see if I can spot the idle
> pattern transmission on those when we don't explicitly enable it.

Ok, the above suggests that it should work automatically, except when
the WA is needed.

> 
> -- 
> Ville Syrjälä
> Intel