[Intel-gfx] [PATCH v1 0/2] Correction to QGV related register addresses

[Vinod Govindapillai]

Wrong offsets are calculated to read QGV points from mem ss. Also
a wrong register address is used to get the dagv block time. Fix
these two issues.

Vinod Govindapillai (2):
  drm/i915/reg: fix QGV points register access offsets
  drm/i915/reg: use the correct register to access SAGV block time

 drivers/gpu/drm/i915/i915_reg.h | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

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2.34.1