[Intel-gfx] [PATCH] drm/i915/mtl: Disable C6 on MTL A0 for media

Belgaumkar, Vinay vinay.belgaumkar at intel.com
Fri Mar 24 18:39:46 UTC 2023


On 3/24/2023 11:02 AM, Umesh Nerlige Ramappa wrote:
> Earlier merge dropped an if block when applying the patch -
> "drm/i915/mtl: Synchronize i915/BIOS on C6 enabling". Bring back the
> if block as the check is required by - "drm/i915/mtl: Disable MC6 for MTL
> A step" to disable C6 on media for A0 stepping.

LGTM,

Reviewed-by: Vinay Belgaumkar <vinay.belgaumkar at intel.com>

>
> Fixes: 3735040978a4 ("drm/i915/mtl: Synchronize i915/BIOS on C6 enabling")
> Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa at intel.com>
> ---
>   drivers/gpu/drm/i915/gt/intel_rc6.c | 7 +++++++
>   1 file changed, 7 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_rc6.c b/drivers/gpu/drm/i915/gt/intel_rc6.c
> index f760586f9f46..8f3cd68d14f8 100644
> --- a/drivers/gpu/drm/i915/gt/intel_rc6.c
> +++ b/drivers/gpu/drm/i915/gt/intel_rc6.c
> @@ -525,6 +525,13 @@ static bool rc6_supported(struct intel_rc6 *rc6)
>   		return false;
>   	}
>   
> +	if (IS_MTL_MEDIA_STEP(gt->i915, STEP_A0, STEP_B0) &&
> +	    gt->type == GT_MEDIA) {
> +		drm_notice(&i915->drm,
> +			   "Media RC6 disabled on A step\n");
> +		return false;
> +	}
> +
>   	return true;
>   }
>   


More information about the Intel-gfx mailing list