[Intel-gfx] [PATCH] drm/i915: Use compressed bpp when calculating m/n value for DP MST DSC

[Nautiyal, Ankit K]

Change looks good to me. I think it will be good to add Fixes tag.

Regards,

Ankit

On 3/27/2023 12:12 PM, Stanislav Lisovskiy wrote:
> For obvious reasons, we use compressed bpp instead of pipe bpp for
> DSC DP SST case. Lets be consistent and use compressed bpp instead of
> pipe bpp, also in DP MST DSC case.
>
> Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy at intel.com>
> ---
>   drivers/gpu/drm/i915/display/intel_dp_mst.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> index a860cbc5dbea..c3e8db943e9c 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> @@ -232,7 +232,7 @@ static int intel_dp_dsc_mst_compute_link_config(struct intel_encoder *encoder,
>   			return slots;
>   	}
>   
> -	intel_link_compute_m_n(crtc_state->pipe_bpp,
> +	intel_link_compute_m_n(crtc_state->dsc.compressed_bpp,
>   			       crtc_state->lane_count,
>   			       adjusted_mode->crtc_clock,
>   			       crtc_state->port_clock,