[Intel-gfx] [PATCH v5 5/6] drm/i915/psr: Check that vblank is long enough for psr2
Ville Syrjälä
ville.syrjala at linux.intel.com
Tue Mar 28 11:24:33 UTC 2023
On Wed, Mar 22, 2023 at 12:34:11PM +0200, Jouni Högander wrote:
> Ensure vblank >= psr2 vblank
> where
> Psr2 vblank = PSR2_CTL Block Count Number maximum line count.
>
> Bspec: 71580, 49274
>
> v2: Use calculated block count number maximum line count
>
> Signed-off-by: Jouni Högander <jouni.hogander at intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
We seem to be also missing the "PSR2 line time" check?
> ---
> drivers/gpu/drm/i915/display/intel_psr.c | 9 +++++++++
> 1 file changed, 9 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
> index 4b7c946a9a25..b53c71c06105 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -968,6 +968,15 @@ static bool intel_psr2_config_valid(struct intel_dp *intel_dp,
> return false;
> }
>
> + /* Vblank >= PSR2_CTL Block Count Number maximum line count */
> + if (crtc_state->hw.adjusted_mode.crtc_vblank_end -
> + crtc_state->hw.adjusted_mode.crtc_vblank_start <
> + psr2_block_count_lines(intel_dp)) {
> + drm_dbg_kms(&dev_priv->drm,
> + "PSR2 not enabled, too short vblank time\n");
> + return false;
> + }
> +
> if (HAS_PSR2_SEL_FETCH(dev_priv)) {
> if (!intel_psr2_sel_fetch_config_valid(intel_dp, crtc_state) &&
> !HAS_PSR_HW_TRACKING(dev_priv)) {
> --
> 2.34.1
--
Ville Syrjälä
Intel
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