[Intel-gfx] [PATCH 4/7] drm/i915/mtl: Add Support for C10 PHY message bus and pll programming

[Imre Deak]

On Wed, Mar 29, 2023 at 06:40:39PM +0300, Imre Deak wrote:
> On Mon, Mar 27, 2023 at 03:34:30PM +0300, Mika Kahola wrote:
> [...] 
> > +}
> > +
> > +static int intel_cx0_wait_for_ack(struct drm_i915_private *i915, enum port port, int lane, u32 *val)
> > +{
> > +	enum phy phy = intel_port_to_phy(i915, port);
> > +
> > +	if (__intel_de_wait_for_register(i915,
> > +					 XELPDP_PORT_P2M_MSGBUS_STATUS(port, lane - 1),
> 
> As above this function should take the 0-based lane value.

Err, I meant here as earlier the function param should be
'u8 lane_mask' and use a helper to convert this mask to a lane.

--Imre