[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for C20 Computed HDMI TMDS pixel clocks
Patchwork
patchwork at emeril.freedesktop.org
Fri May 5 21:28:01 UTC 2023
== Series Details ==
Series: C20 Computed HDMI TMDS pixel clocks
URL : https://patchwork.freedesktop.org/series/117399/
State : warning
== Summary ==
Error: dim checkpatch failed
25766d718057 drm/i915: Add 16bit register/mask operators
-:27: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__n' - possible side-effects?
#27: FILE: drivers/gpu/drm/i915/i915_reg_defs.h:155:
+#define REG_BIT16(__n) \
+ ((u16)(BIT(__n) + \
+ BUILD_BUG_ON_ZERO(__is_constexpr(__n) && \
+ ((__n) < 0 || (__n) > 15))))
-:42: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__high' - possible side-effects?
#42: FILE: drivers/gpu/drm/i915/i915_reg_defs.h:170:
+#define REG_GENMASK16(__high, __low) \
+ ((u16)(GENMASK(__high, __low) + \
+ BUILD_BUG_ON_ZERO(__is_constexpr(__high) && \
+ __is_constexpr(__low) && \
+ ((__low) < 0 || (__high) > 15 || (__low) > (__high)))))
-:42: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__low' - possible side-effects?
#42: FILE: drivers/gpu/drm/i915/i915_reg_defs.h:170:
+#define REG_GENMASK16(__high, __low) \
+ ((u16)(GENMASK(__high, __low) + \
+ BUILD_BUG_ON_ZERO(__is_constexpr(__high) && \
+ __is_constexpr(__low) && \
+ ((__low) < 0 || (__high) > 15 || (__low) > (__high)))))
-:59: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__mask' - possible side-effects?
#59: FILE: drivers/gpu/drm/i915/i915_reg_defs.h:187:
+#define REG_FIELD_PREP16(__mask, __val) \
+ ((u16)((((typeof(__mask))(__val) << __bf_shf(__mask)) & (__mask)) + \
+ BUILD_BUG_ON_ZERO(!__is_constexpr(__mask)) + \
+ BUILD_BUG_ON_ZERO((__mask) == 0 || (__mask) > U16_MAX) + \
+ BUILD_BUG_ON_ZERO(!IS_POWER_OF_2((__mask) + (1ULL << __bf_shf(__mask)))) + \
+ BUILD_BUG_ON_ZERO(__builtin_choose_expr(__is_constexpr(__val), (~((__mask) >> __bf_shf(__mask)) & (__val)), 0))))
-:59: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__val' - possible side-effects?
#59: FILE: drivers/gpu/drm/i915/i915_reg_defs.h:187:
+#define REG_FIELD_PREP16(__mask, __val) \
+ ((u16)((((typeof(__mask))(__val) << __bf_shf(__mask)) & (__mask)) + \
+ BUILD_BUG_ON_ZERO(!__is_constexpr(__mask)) + \
+ BUILD_BUG_ON_ZERO((__mask) == 0 || (__mask) > U16_MAX) + \
+ BUILD_BUG_ON_ZERO(!IS_POWER_OF_2((__mask) + (1ULL << __bf_shf(__mask)))) + \
+ BUILD_BUG_ON_ZERO(__builtin_choose_expr(__is_constexpr(__val), (~((__mask) >> __bf_shf(__mask)) & (__val)), 0))))
-:64: WARNING:LONG_LINE: line length of 128 exceeds 100 columns
#64: FILE: drivers/gpu/drm/i915/i915_reg_defs.h:192:
+ BUILD_BUG_ON_ZERO(__builtin_choose_expr(__is_constexpr(__val), (~((__mask) >> __bf_shf(__mask)) & (__val)), 0))))
-:66: CHECK:LINE_SPACING: Please don't use multiple blank lines
#66: FILE: drivers/gpu/drm/i915/i915_reg_defs.h:194:
+
+
total: 0 errors, 1 warnings, 6 checks, 55 lines checked
3d5e5a7f1c8d drm/i915/hdmi: C20 computed PLL frequencies
-:58: WARNING:LONG_LINE: line length of 101 exceeds 100 columns
#58: FILE: drivers/gpu/drm/i915/display/intel_cx0_phy.c:1932:
+ mpll_div_multiplier = min_t(u8, div64_u64((vco_freq * 16 + (datarate >> 1)), datarate), 255);
-:137: CHECK:UNNECESSARY_PARENTHESES: Unnecessary parentheses around 'clock >= 25175'
#137: FILE: drivers/gpu/drm/i915/display/intel_cx0_phy.c:2176:
+ if ((clock >= 25175) && (clock <= 600000))
-:137: CHECK:UNNECESSARY_PARENTHESES: Unnecessary parentheses around 'clock <= 600000'
#137: FILE: drivers/gpu/drm/i915/display/intel_cx0_phy.c:2176:
+ if ((clock >= 25175) && (clock <= 600000))
total: 0 errors, 1 warnings, 2 checks, 177 lines checked
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