[Intel-gfx] [PATCH v3 2/2] drm/i915/mtl: Extend Wa_16014892111 to MTL A-step

[Radhakrishna Sripada]

The dg2 workaround which requires the register for
DRAW_WATERMARK to be saved/restored during context reset/switch
is required on MTL-A step as well.

v2: Limit the WA for A-step
v3: Update the commit message.

Bspec: 68331
Cc: Haridhar Kalvala <haridhar.kalvala at intel.com>
Cc: Matt Roper <matthew.d.roper at intel.com>
Cc: Gustavo Sousa <gustavo.sousa at intel.com>
Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada at intel.com>
---
 drivers/gpu/drm/i915/gt/intel_lrc.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c
index 81a96c52a92b..9c1007c44298 100644
--- a/drivers/gpu/drm/i915/gt/intel_lrc.c
+++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
@@ -1370,7 +1370,9 @@ gen12_emit_indirect_ctx_rcs(const struct intel_context *ce, u32 *cs)
 					      cs, GEN12_GFX_CCS_AUX_NV);
 
 	/* Wa_16014892111 */
-	if (IS_DG2(ce->engine->i915))
+	if (IS_DG2(ce->engine->i915) ||
+	    IS_MTL_GRAPHICS_STEP(ce->engine->i915, M, STEP_A0, STEP_B0) ||
+	    IS_MTL_GRAPHICS_STEP(ce->engine->i915, P, STEP_A0, STEP_B0))
 		cs = dg2_emit_draw_watermark_setting(cs);
 
 	return cs;
-- 
2.34.1