[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for C20 Computed HDMI TMDS pixel clocks (rev2)

[Patchwork]

== Series Details ==

Series: C20 Computed HDMI TMDS pixel clocks (rev2)
URL   : https://patchwork.freedesktop.org/series/117399/
State : warning

== Summary ==

Error: dim checkpatch failed
7374d5d94fea drm/i915: Add 16bit register/mask operators
-:29: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__n' - possible side-effects?
#29: FILE: drivers/gpu/drm/i915/i915_reg_defs.h:155:
+#define REG_BIT16(__n)                                                   \
+	((u16)(BIT(__n) +                                                \
+	       BUILD_BUG_ON_ZERO(__is_constexpr(__n) &&         \
+				 ((__n) < 0 || (__n) > 15))))

-:44: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__high' - possible side-effects?
#44: FILE: drivers/gpu/drm/i915/i915_reg_defs.h:170:
+#define REG_GENMASK16(__high, __low)                                     \
+	((u16)(GENMASK(__high, __low) +                                  \
+	       BUILD_BUG_ON_ZERO(__is_constexpr(__high) &&      \
+				 __is_constexpr(__low) &&               \
+				 ((__low) < 0 || (__high) > 15 || (__low) > (__high)))))

-:44: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__low' - possible side-effects?
#44: FILE: drivers/gpu/drm/i915/i915_reg_defs.h:170:
+#define REG_GENMASK16(__high, __low)                                     \
+	((u16)(GENMASK(__high, __low) +                                  \
+	       BUILD_BUG_ON_ZERO(__is_constexpr(__high) &&      \
+				 __is_constexpr(__low) &&               \
+				 ((__low) < 0 || (__high) > 15 || (__low) > (__high)))))

-:61: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__mask' - possible side-effects?
#61: FILE: drivers/gpu/drm/i915/i915_reg_defs.h:187:
+#define REG_FIELD_PREP16(__mask, __val)                                          \
+	((u16)((((typeof(__mask))(__val) << __bf_shf(__mask)) & (__mask)) +      \
+	       BUILD_BUG_ON_ZERO(!__is_constexpr(__mask)) +             \
+	       BUILD_BUG_ON_ZERO((__mask) == 0 || (__mask) > U16_MAX) +          \
+	       BUILD_BUG_ON_ZERO(!IS_POWER_OF_2((__mask) + (1ULL << __bf_shf(__mask)))) + \
+	       BUILD_BUG_ON_ZERO(__builtin_choose_expr(__is_constexpr(__val), (~((__mask) >> __bf_shf(__mask)) & (__val)), 0))))

-:61: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__val' - possible side-effects?
#61: FILE: drivers/gpu/drm/i915/i915_reg_defs.h:187:
+#define REG_FIELD_PREP16(__mask, __val)                                          \
+	((u16)((((typeof(__mask))(__val) << __bf_shf(__mask)) & (__mask)) +      \
+	       BUILD_BUG_ON_ZERO(!__is_constexpr(__mask)) +             \
+	       BUILD_BUG_ON_ZERO((__mask) == 0 || (__mask) > U16_MAX) +          \
+	       BUILD_BUG_ON_ZERO(!IS_POWER_OF_2((__mask) + (1ULL << __bf_shf(__mask)))) + \
+	       BUILD_BUG_ON_ZERO(__builtin_choose_expr(__is_constexpr(__val), (~((__mask) >> __bf_shf(__mask)) & (__val)), 0))))

-:66: WARNING:LONG_LINE: line length of 128 exceeds 100 columns
#66: FILE: drivers/gpu/drm/i915/i915_reg_defs.h:192:
+	       BUILD_BUG_ON_ZERO(__builtin_choose_expr(__is_constexpr(__val), (~((__mask) >> __bf_shf(__mask)) & (__val)), 0))))

total: 0 errors, 1 warnings, 5 checks, 54 lines checked
f585a9123138 drm/i915/hdmi: C20 computed PLL frequencies
-:59: WARNING:LONG_LINE: line length of 101 exceeds 100 columns
#59: FILE: drivers/gpu/drm/i915/display/intel_cx0_phy.c:1932:
+	mpll_div_multiplier = min_t(u8, div64_u64((vco_freq * 16 + (datarate >> 1)), datarate), 255);

total: 0 errors, 1 warnings, 0 checks, 177 lines checked