[Intel-gfx] [PATCH 04/13] drm/i915/dp: Update Bigjoiner interface bits for computing compressed bpp
Nautiyal, Ankit K
ankit.k.nautiyal at intel.com
Thu May 18 13:16:34 UTC 2023
On 5/15/2023 7:21 PM, Ville Syrjälä wrote:
> On Fri, May 12, 2023 at 11:54:08AM +0530, Ankit Nautiyal wrote:
>> In Bigjoiner check for DSC, bigjoiner interface bits for DP for
>> DISPLAY > 13 is 36 (Bspec: 49259).
>>
>> v2: Corrected Display ver to 13.
>>
>> v3: Follow convention for conditional statement. (Ville)
>>
>> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal at intel.com>
>> ---
>> drivers/gpu/drm/i915/display/intel_dp.c | 3 ++-
>> 1 file changed, 2 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
>> index 24de25551a49..bca80c0793e9 100644
>> --- a/drivers/gpu/drm/i915/display/intel_dp.c
>> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
>> @@ -783,8 +783,9 @@ u16 intel_dp_dsc_get_max_compressed_bpp(struct drm_i915_private *i915,
>> bits_per_pixel = min(bits_per_pixel, max_bpp_small_joiner_ram);
>>
>> if (bigjoiner) {
>> + int bigjoiner_interface_bits = DISPLAY_VER(i915) > 13 ? 36 : 24;
> 'x >= 14' is the usual convention.
>
> with that
> Reviewed-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
Thanks Ville for the reviews.
Will fix the check in next version of the patch.
Regards,
Ankit
>
>> u32 max_bpp_bigjoiner =
>> - i915->display.cdclk.max_cdclk_freq * 48 /
>> + i915->display.cdclk.max_cdclk_freq * 2 * bigjoiner_interface_bits /
>> intel_dp_mode_to_fec_clock(mode_clock);
>>
>> bits_per_pixel = min(bits_per_pixel, max_bpp_bigjoiner);
>> --
>> 2.25.1
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