[Intel-gfx] [PATCH] drm/i915: Use 18 fast wake fast wake AUX sync len

[Hogander, Jouni]

On Tue, 2023-05-30 at 12:14 +0300, Jani Nikula wrote:
> On Mon, 29 May 2023, Jouni Högander <jouni.hogander at intel.com> wrote:
> > HW default for wake sync pulses is 18. 10 precarge and 8 preamble.
> > There is
> > no reason to change this especially as it is causing problems with
> > certain
> > eDP panels.
> > 
> > Signed-off-by: Jouni Högander <jouni.hogander at intel.com>
> > Fixes: 605f7c731333 ("drm/i915: Fix fast wake AUX sync len")
> 
> Due to the cherry-picks I think it's better to reference e1c71f8f9180
> ("drm/i915: Fix fast wake AUX sync len") which has been backported to
> stable. We need this fix to go wherever that's been backported.

Ok, I will change this.

> 
> What happens if we use cc: stable and this gets backported to a
> kernel
> that does *not* have "drm/i915: Fix fast wake AUX sync len"? Any harm
> in
> that?

Our current understanding is that we should use 10 sync pulses for
precharge. Which is actually the HW default. Original value our driver
was writing before "drm/i915: Fix fast wake AUX sync len" was clearly
wrong -> It should be right thing to do to backport this even if
previous adjustment ("drm/i915: Fix fast wake AUX sync len") doesn't
exist.

BR,

Jouni Högander

> 
> BR,
> Jani.
> 
> 
> 
> > Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/8475
> > ---
> >  drivers/gpu/drm/i915/display/intel_dp_aux.c | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux.c
> > b/drivers/gpu/drm/i915/display/intel_dp_aux.c
> > index 0c27db8ae4f1..197c6e81db14 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp_aux.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dp_aux.c
> > @@ -129,7 +129,7 @@ static int intel_dp_aux_sync_len(void)
> >  
> >  static int intel_dp_aux_fw_sync_len(void)
> >  {
> > -       int precharge = 16; /* 10-16 */
> > +       int precharge = 10; /* 10-16 */
> >         int preamble = 8;
> >  
> >         return precharge + preamble;
>