[Intel-gfx] [PATCH v2 00/11] drm/i915: Fix UHBR data, link M/N/TU and PBN values
Imre Deak
imre.deak at intel.com
Mon Nov 20 13:10:49 UTC 2023
On Mon, Nov 20, 2023 at 02:31:34PM +0200, Jani Nikula wrote:
> On Thu, 16 Nov 2023, Imre Deak <imre.deak at intel.com> wrote:
> > This is v2 of [1], with the following changes:
> > - Store the pbn_div value in fixed point format.
> > - Fix PBN calculation in patch 8.
> > - Reuse intel_dp_max_data_rate(), intel_dp_effective_data_rate() in
> > intel_link_compute_m_n() (Jani).
> >
> > [1] https://lore.kernel.org/all/20231113201110.510724-1-imre.deak@intel.com
> >
> > Cc: Arun R Murthy <arun.r.murthy at intel.com>
> > Cc: Jani Nikula <jani.nikula at linux.intel.com>
> > Cc: Lyude Paul <lyude at redhat.com>
> >
> > Imre Deak (11):
> > drm/dp_mst: Store the MST PBN divider value in fixed point format
> > drm/dp_mst: Fix PBN divider calculation for UHBR rates
> > drm/dp_mst: Add kunit tests for drm_dp_get_vc_payload_bw()
>
> Maarten, Maxime, Thomas, ack for merging these three via drm-intel-next?
>
> Imre, I note that said patches were Cc: dri-devel, but for future
> reference please Cc: the entire series to dri-devel when you include
> dependencies that you plan to merge via drm-intel.
Ok. I assumed the alternative to merge the 3 patches via drm-misc-next,
wait for that to get merged back to i915 and then merge the rest to i915
was still a preferred way; wondering now if in general this is better to
avoid merge conflicts similar to the one reported now wrt.
"drm/dp_mst: Fix fractional DSC bpp handling".
In any case yes, I can CC dri-devel the whole patchset whenever there
are any drm changes in it. While still wondering about the ideal
approach above, I'd still prefer if the 3 drm patches in this one could
also get merged via the i915 tree.
--Imre
> BR,
> Jani.
>
>
> > drm/i915/dp: Replace intel_dp_is_uhbr_rate() with
> > drm_dp_is_uhbr_rate()
> > drm/i915/dp: Account for channel coding efficiency on UHBR links
> > drm/i915/dp: Fix UHBR link M/N values
> > drm/i915/dp_mst: Calculate the BW overhead in
> > intel_dp_mst_find_vcpi_slots_for_bpp()
> > drm/i915/dp_mst: Fix PBN / MTP_TU size calculation for UHBR rates
> > drm/i915/dp: Report a rounded-down value as the maximum data rate
> > drm/i915/dp: Simplify intel_dp_max_data_rate()
> > drm/i915/dp: Reuse intel_dp_{max,effective}_data_rate in
> > intel_link_compute_m_n()
> >
> > .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 5 +-
> > .../amd/display/amdgpu_dm/amdgpu_dm_helpers.c | 3 +-
> > .../display/amdgpu_dm/amdgpu_dm_mst_types.c | 5 +-
> > drivers/gpu/drm/display/drm_dp_mst_topology.c | 31 +++-
> > drivers/gpu/drm/i915/display/intel_display.c | 51 ++----
> > drivers/gpu/drm/i915/display/intel_dp.c | 78 +++++++---
> > drivers/gpu/drm/i915/display/intel_dp.h | 5 +-
> > drivers/gpu/drm/i915/display/intel_dp_mst.c | 55 +++++--
> > drivers/gpu/drm/nouveau/dispnv50/disp.c | 6 +-
> > .../gpu/drm/tests/drm_dp_mst_helper_test.c | 145 ++++++++++++++++++
> > include/drm/display/drm_dp_helper.h | 13 ++
> > include/drm/display/drm_dp_mst_helper.h | 7 +-
> > 12 files changed, 311 insertions(+), 93 deletions(-)
>
> --
> Jani Nikula, Intel
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