[Intel-gfx] [PATCH 2/4] drm/i915/psr: Include some basic PSR information in the state dump

Hogander, Jouni jouni.hogander at intel.com
Thu Nov 23 07:15:53 UTC 2023


On Wed, 2023-11-22 at 11:31 +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala at linux.intel.com>
> 
> Currently no one can figure out what the PSR code is doing since
> we're including any of it in the basic state dump. Add at least the
> bare minimum there.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_crtc_state_dump.c | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
> b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
> index 2d15e82c0b3d..5bcdbf083281 100644
> --- a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
> +++ b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
> @@ -262,6 +262,11 @@ void intel_crtc_state_dump(const struct
> intel_crtc_state *pipe_config,
>                 drm_dbg_kms(&i915->drm, "fec: %s, enhanced framing:
> %s\n",
>                             str_enabled_disabled(pipe_config-
> >fec_enable),
>                             str_enabled_disabled(pipe_config-
> >enhanced_framing));
> +
> +               drm_dbg_kms(&i915->drm, "psr: %s, psr2: %s, selective
> fetch: %s\n",
> +                           str_enabled_disabled(pipe_config-
> >has_psr),
> +                           str_enabled_disabled(pipe_config-
> >has_psr2),
> +                           str_enabled_disabled(pipe_config-
> >enable_psr2_sel_fetch));

Maybe you could add pipe_config->has_panel_replay here as well?

BR,

Jouni Högander
 
>         }
>  
>         drm_dbg_kms(&i915->drm, "framestart delay: %d, MSA timing
> delay: %d\n",



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