[Intel-gfx] [PATCH v11 3/7] drm/i915: Define and use GuC and CTB TLB invalidation routines
John Harrison
john.c.harrison at intel.com
Wed Oct 11 17:52:10 UTC 2023
On 10/10/2023 17:02, Jonathan Cavitt wrote:
> From: Prathap Kumar Valsan <prathap.kumar.valsan at intel.com>
>
> The GuC firmware had defined the interface for Translation Look-Aside
> Buffer (TLB) invalidation. We should use this interface when
> invalidating the engine and GuC TLBs.
> Add additional functionality to intel_gt_invalidate_tlb, invalidating
> the GuC TLBs and falling back to GT invalidation when the GuC is
> disabled.
> The invalidation is done by sending a request directly to the GuC
> tlb_lookup that invalidates the table. The invalidation is submitted as
> a wait request and is performed in the CT event handler. This means we
> cannot perform this TLB invalidation path if the CT is not enabled.
> If the request isn't fulfilled in two seconds, this would constitute
> an error in the invalidation as that would constitute either a lost
> request or a severe GuC overload.
>
> With this new invalidation routine, we can perform GuC-based GGTT
> invalidations. GuC-based GGTT invalidation is incompatible with
> MMIO invalidation so we should not perform MMIO invalidation when
> GuC-based GGTT invalidation is expected.
>
> The additional complexity incurred in this patch will be necessary for
> range-based tlb invalidations, which will be platformed in the future.
>
> Signed-off-by: Prathap Kumar Valsan <prathap.kumar.valsan at intel.com>
> Signed-off-by: Bruce Chang <yu.bruce.chang at intel.com>
> Signed-off-by: Chris Wilson <chris.p.wilson at intel.com>
> Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa at intel.com>
> Signed-off-by: Jonathan Cavitt <jonathan.cavitt at intel.com>
> Signed-off-by: Aravind Iddamsetty <aravind.iddamsetty at intel.com>
> Signed-off-by: Fei Yang <fei.yang at intel.com>
> CC: Andi Shyti <andi.shyti at linux.intel.com>
> Reviewed-by: Andi Shyti <andi.shyti at linux.intel.com>
Reviewed-by: John Harrison <John.C.Harrison at Intel.com>
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