[Intel-gfx] [PATCH v2] drm/i915/mtl: Don't set PIPE_CONTROL_FLUSH_L3

[Andi Shyti]

Hi Vinay,

On Tue, Oct 17, 2023 at 12:53:09PM -0700, Vinay Belgaumkar wrote:
> This bit does not cause an explicit L3 flush. We already use
> PIPE_CONTROL_DC_FLUSH_ENABLE for that purpose.
> 
> v2: Use FLUSH_L3 only pre-MTL since spec will likely remain
> the same going forward.
> 
> Cc: Nirmoy Das <nirmoy.das at intel.com>
> Cc: Mika Kuoppala <mika.kuoppala at intel.com>
> Acked-by: Mika Kuoppala <mika.kuoppala at linux.intel.com>
> Reviewed-by: Nirmoy Das <nirmoy.das at intel.com>
> Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar at intel.com>

Reviewed-by: Andi Shyti <andi.shyti at linux.intel.com> 

Andi