[Intel-gfx] [PATCH 25/29] drm/i915: Factor out function to clear pipe update flags

[Imre Deak]

On Fri, Oct 27, 2023 at 06:42:20PM +0300, Ville Syrjälä wrote:
> On Tue, Oct 24, 2023 at 04:09:21AM +0300, Imre Deak wrote:
> > Factor out a helper to clear the pipe update flags, used by a follow-up
> > patch to modeset an MST topology.
> > 
> > Signed-off-by: Imre Deak <imre.deak at intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_display.c | 52 ++++++++++----------
> >  1 file changed, 27 insertions(+), 25 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> > index de352d9c43439..22f88389035bd 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > @@ -5551,6 +5551,16 @@ int intel_modeset_pipes_in_mask_early(struct intel_atomic_state *state,
> >  	return 0;
> >  }
> >  
> > +static void clear_pipe_update_flags_on_modeset_crtc(struct intel_crtc_state *crtc_state)
> > +{
> > +	if (!intel_crtc_needs_modeset(crtc_state))
> > +		return;
> 
> This feels more confusing than not. I'd probably keep the modeset
> check out from this function.

Ok, can move it to the callers where it's needed (i.e. all except for
intel_modeset_all_pipes_late()).

> > +
> > +	crtc_state->update_pipe = false;
> > +	crtc_state->update_m_n = false;
> > +	crtc_state->update_lrr = false;
> > +}
> > +
> >  /**
> >   * intel_modeset_all_pipes_late - force a full modeset on all pipes
> >   * @state: intel atomic state
> > @@ -5584,9 +5594,8 @@ int intel_modeset_all_pipes_late(struct intel_atomic_state *state,
> >  		if (ret)
> >  			return ret;
> >  
> > -		crtc_state->update_pipe = false;
> > -		crtc_state->update_m_n = false;
> > -		crtc_state->update_lrr = false;
> > +		clear_pipe_update_flags_on_modeset_crtc(crtc_state);
> > +
> >  		crtc_state->update_planes |= crtc_state->active_planes;
> >  		crtc_state->async_flip_planes = 0;
> >  		crtc_state->do_async_flip = false;
> > @@ -5699,13 +5708,13 @@ static void intel_crtc_check_fastset(const struct intel_crtc_state *old_crtc_sta
> >  	else
> >  		new_crtc_state->uapi.mode_changed = false;
> >  
> > -	if (intel_crtc_needs_modeset(new_crtc_state) ||
> > -	    intel_compare_link_m_n(&old_crtc_state->dp_m_n,
> > +	clear_pipe_update_flags_on_modeset_crtc(new_crtc_state);
> > +
> > +	if (intel_compare_link_m_n(&old_crtc_state->dp_m_n,
> >  				   &new_crtc_state->dp_m_n))
> >  		new_crtc_state->update_m_n = false;
> >  
> > -	if (intel_crtc_needs_modeset(new_crtc_state) ||
> > -	    (old_crtc_state->hw.adjusted_mode.crtc_vtotal == new_crtc_state->hw.adjusted_mode.crtc_vtotal &&
> > +	if ((old_crtc_state->hw.adjusted_mode.crtc_vtotal == new_crtc_state->hw.adjusted_mode.crtc_vtotal &&
> >  	     old_crtc_state->hw.adjusted_mode.crtc_vblank_end == new_crtc_state->hw.adjusted_mode.crtc_vblank_end))
> >  		new_crtc_state->update_lrr = false;
> >  
> > @@ -6484,12 +6493,9 @@ int intel_atomic_check(struct drm_device *dev,
> >  		if (intel_dp_mst_is_slave_trans(new_crtc_state)) {
> >  			enum transcoder master = new_crtc_state->mst_master_transcoder;
> >  
> > -			if (intel_cpu_transcoders_need_modeset(state, BIT(master))) {
> > -				new_crtc_state->uapi.mode_changed = true;
> > -				new_crtc_state->update_pipe = false;
> > -				new_crtc_state->update_m_n = false;
> > -				new_crtc_state->update_lrr = false;
> > -			}
> > +			if (intel_cpu_transcoders_need_modeset(state, BIT(master)))
> > +				intel_modeset_pipes_in_mask_early(state, "MST master transcoder",
> > +								  BIT(crtc->pipe));
> >  		}
> >  
> >  		if (is_trans_port_sync_mode(new_crtc_state)) {
> > @@ -6498,22 +6504,18 @@ int intel_atomic_check(struct drm_device *dev,
> >  			if (new_crtc_state->master_transcoder != INVALID_TRANSCODER)
> >  				trans |= BIT(new_crtc_state->master_transcoder);
> >  
> > -			if (intel_cpu_transcoders_need_modeset(state, trans)) {
> > -				new_crtc_state->uapi.mode_changed = true;
> > -				new_crtc_state->update_pipe = false;
> > -				new_crtc_state->update_m_n = false;
> > -				new_crtc_state->update_lrr = false;
> > -			}
> > +			if (intel_cpu_transcoders_need_modeset(state, trans))
> > +				intel_modeset_pipes_in_mask_early(state, "port sync",
> > +								  BIT(crtc->pipe));
> >  		}
> >  
> >  		if (new_crtc_state->bigjoiner_pipes) {
> > -			if (intel_pipes_need_modeset(state, new_crtc_state->bigjoiner_pipes)) {
> > -				new_crtc_state->uapi.mode_changed = true;
> > -				new_crtc_state->update_pipe = false;
> > -				new_crtc_state->update_m_n = false;
> > -				new_crtc_state->update_lrr = false;
> > -			}
> > +			if (intel_pipes_need_modeset(state, new_crtc_state->bigjoiner_pipes))
> > +				intel_modeset_pipes_in_mask_early(state, "bigjoiner pipes",
> > +								  BIT(crtc->pipe));
> >  		}
> > +
> > +		clear_pipe_update_flags_on_modeset_crtc(new_crtc_state);
> >  	}
> >  
> >  	for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
> > -- 
> > 2.39.2
> 
> -- 
> Ville Syrjälä
> Intel